marin (Dec 06 2024 at 23:57): marin (Dec 06 2024 at 23:57):apparently, cranelift codegen will only take a I64 for division: https://github.com/bytecodealliance/wasmtime/blob/main/cranelift/codegen/src/isa/aarch64/inst/emit.rs#L730-L734
why is that? Does that mean that mean that I must sign-extend I32 values?
marin (Dec 06 2024 at 23:57):is that where it's done in cranelift? https://github.com/bytecodealliance/wasmtime/blob/main/cranelift/codegen/src/isa/aarch64/inst.isle#L3142-L3148
Saúl Cabrera (Dec 09 2024 at 12:09):That's correct, currently we have to sign-extend, given cranelift's codegen 64 bit requirement.
The ARM docs state that {s/u}div can be 64 or 32 bit [1], [2]. Unless there a fundamental reason that I'm not aware of, I think it might make sense to add the 32-bit variants to avoid having to extend.
Saúl Cabrera (Dec 09 2024 at 12:09):Doing some historical research, it seems that prior to migrating to ISLE, that was the intention https://github.com/bytecodealliance/wasmtime/pull/3572/files#diff-bd652d5af8795961ba7456cf427fdae37bb82500e9f18fa6fc1621281bd1ab58L103
Saúl Cabrera (Dec 09 2024 at 12:11):We probably don't have to do that in this PR though -- I'll create a separate issue to track that work and migrate the instruction over.
Last updated: Dec 23 2024 at 14:03 UTC