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a1phyr commented on issue #7139:
Do you have a idea of what causes the failure ? I don't understand why the sign bit is set in these tests.
A simple function loading the constant outputs the right code:
function %f() -> f64 { block0: v0 = f64const 0xf64.0 return v0 } ; VCode: ; block0: ; lui a0,-518695 ; slli a2,a0,31 ; fmv.d.x fa0,a2 ; ret ; ; Disassembled: ; block0: ; offset 0x0 ; lui a0, 0x815d9 ; slli a2, a0, 0x1f ; fmv.d.x fa0, a2 ; ret
afonso360 commented on issue #7139:
I think this might be because
lui
for RISC-V 64bit sign extends the immediate after placing it in the register.This is the expression that
lui
computes:x[rd] = sext(immediate[31:12] << 12)
The immediate has the MSB set, and since we don't fully shift immediate all the way to the top we are observing the sign extension.
afonso360 edited a comment on issue #7139:
I think this might be because
lui
for RISC-V 64bit sign extends the immediate after placing it in the register.This is the expression that
lui
computes:x[rd] = sext(immediate[31:12] << 12)
The immediate has the MSB set, and since we don't fully shift all the way to the top we are observing the sign extension.
afonso360 edited a comment on issue #7139:
I think this might be because
lui
for RISC-V 64bit sign extends the immediate after placing it in the register.This is the expression that
lui
computes:x[rd] = sext(immediate[31:12] << 12)
The immediate has the MSB set, and since we don't fully shift all the way to the top we are observing the sign extension bit.
afonso360 edited a comment on issue #7139:
I think this might be because
lui
for RISC-V 64bit sign extends the immediate after placing it in the register.This is the expression that
lui
computes:x[rd] = sext(immediate[31:12] << 12)
The immediate has the MSB set, and since we don't fully shift all the way to the top we are observing the sign extension bit.
This test might show what is happening slightly better:
test run target riscv64 function %iconst() -> i64 { block0: v0 = iconst.i64 0x0000_40AE_C800_0000 return v0 } ; run: %iconst() == 0x0000_40AE_C800_0000 ;; we get == 0xFFFF_C0AE_C800_0000
afonso360 edited a comment on issue #7139:
I think this might be because
lui
for RISC-V 64bit sign extends the immediate before placing it in the register.This is the expression that
lui
computes:x[rd] = sext(immediate[31:12] << 12)
The immediate has the MSB set, and since we don't fully shift all the way to the top we are observing the sign extension bit.
This test might show what is happening slightly better:
test run target riscv64 function %iconst() -> i64 { block0: v0 = iconst.i64 0x0000_40AE_C800_0000 return v0 } ; run: %iconst() == 0x0000_40AE_C800_0000 ;; we get == 0xFFFF_C0AE_C800_0000
a1phyr commented on issue #7139:
Oh I missed that ! Thanks a lot !
a1phyr commented on issue #7139:
Note: this does not work for constants like
0xf7fff00000000000
but that would significantly complicate the code.
Last updated: Dec 23 2024 at 12:05 UTC