MaxGraey edited issue #4803:
fneg(fabs(x))
could be possible aftercopysign(x, -C) -> fneg(fabs(x))
peephole optimization on LLVM / Binaryen, so I guess it's make sense to simplify it further on cranelift during lowering stage forx64
it will be just singleorps xmm, ptr [0x8000000000000000, 0x8000000000000000]
(pseudocode) instruction.
MaxGraey edited issue #4803:
fneg(fabs(x))
could be possible aftercopysign(x, -C) -> fneg(fabs(x))
peephole optimization on LLVM / Binaryen, so I guess it's make sense to simplify it further on cranelift during lowering stage.
x64
:orpd xmm0, #0x8000000000000000
armv7
:orr r1, r1, #-2147483648
ppc
:fnabs 1,1 blr
s390x
:lndbr %f0,%f0 br %r14
the rest is preserve
fneg + fabs
MaxGraey edited issue #4803:
fneg(fabs(x))
could be possible aftercopysign(x, -C) -> fneg(fabs(x))
peephole optimization on LLVM / Binaryen, so I guess it's make sense to simplify it further on cranelift during lowering stage.
x64
:orpd xmm0, #0x8000000000000000
armv7
:orr r1, r1, #-2147483648
ppc
:fnabs 1,1 blr
s390x
:lndbr %f0,%f0 br %r14
the rest is preserving
fneg + fabs
MaxGraey edited issue #4803:
fneg(fabs(x))
could be possible aftercopysign(x, -C) -> fneg(fabs(x))
peephole optimization on LLVM / Binaryen, so I guess it's make sense to simplify it further on cranelift during lowering stage.
x64
:orsd xmm0, #0x8000000000000000
armv7
:orr r1, r1, #-2147483648
ppc
:fnabs 1,1 blr
s390x
:lndbr %f0,%f0 br %r14
the rest is preserving
fneg + fabs
Last updated: Dec 23 2024 at 13:07 UTC