alexcrichton opened issue #4736:
Bisection shows that this is a regression from #4722 (cc @elliottt), but with this input:
(module (func (param v128) (result i32) global.get 0 i16x8.extend_high_i8x16_u i8x16.extract_lane_u 11 ) (global v128 v128.const i64x2 0 0) )
this fails to compile on x86_64 with:
$ cargo run -q compile foo.wat ERROR cranelift_codegen::machinst::compile > Register allocation error for vcode VCode { Entry block: 0 v132 := v139 v135 := v137 Block 0: (original IR block: block0) (successor: Block 1) (instruction range: 0 .. 9) Inst 0: movq %rdi, %v128 Inst 1: movq %rsi, %v129 Inst 2: movdqa %xmm0, %v130 Inst 3: palignr $8, %v131, 80(%v128), %v138 Inst 4: pmovzxbw %v138, %v139 Inst 5: movdqa %v132, %v133 Inst 6: pextrb $11, %v133, %v134 Inst 7: movzbl %v134b, %v137l Inst 8: jmp label1 Block 1: (original IR block: block1) (instruction range: 9 .. 12) Inst 9: movq %v135, %v136 Inst 10: movq %v136, %rax Inst 11: ret } Error: EntryLivein CLIF for error: function u0:0(i64 vmctx, i64, i8x16) -> i32 fast { gv0 = vmctx gv1 = load.i64 notrap aligned readonly gv0+8 gv2 = load.i64 notrap aligned gv1 gv3 = vmctx stack_limit = gv2 block0(v0: i64, v1: i64, v2: i8x16): v4 -> v0 @0031 v5 = load.i8x16 notrap aligned table v0+80 @0033 v6 = uwiden_high v5 @0036 v7 = raw_bitcast.i8x16 v6 @0036 v8 = extractlane v7, 11 @0036 v9 = uextend.i32 v8 v3 -> v9 @0039 jump block1 block1: @0039 return v9 } thread '<unnamed>' panicked at 'register allocation: EntryLivein', cranelift/codegen/src/machinst/compile.rs:48:14 note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
alexcrichton labeled issue #4736:
Bisection shows that this is a regression from #4722 (cc @elliottt), but with this input:
(module (func (param v128) (result i32) global.get 0 i16x8.extend_high_i8x16_u i8x16.extract_lane_u 11 ) (global v128 v128.const i64x2 0 0) )
this fails to compile on x86_64 with:
$ cargo run -q compile foo.wat ERROR cranelift_codegen::machinst::compile > Register allocation error for vcode VCode { Entry block: 0 v132 := v139 v135 := v137 Block 0: (original IR block: block0) (successor: Block 1) (instruction range: 0 .. 9) Inst 0: movq %rdi, %v128 Inst 1: movq %rsi, %v129 Inst 2: movdqa %xmm0, %v130 Inst 3: palignr $8, %v131, 80(%v128), %v138 Inst 4: pmovzxbw %v138, %v139 Inst 5: movdqa %v132, %v133 Inst 6: pextrb $11, %v133, %v134 Inst 7: movzbl %v134b, %v137l Inst 8: jmp label1 Block 1: (original IR block: block1) (instruction range: 9 .. 12) Inst 9: movq %v135, %v136 Inst 10: movq %v136, %rax Inst 11: ret } Error: EntryLivein CLIF for error: function u0:0(i64 vmctx, i64, i8x16) -> i32 fast { gv0 = vmctx gv1 = load.i64 notrap aligned readonly gv0+8 gv2 = load.i64 notrap aligned gv1 gv3 = vmctx stack_limit = gv2 block0(v0: i64, v1: i64, v2: i8x16): v4 -> v0 @0031 v5 = load.i8x16 notrap aligned table v0+80 @0033 v6 = uwiden_high v5 @0036 v7 = raw_bitcast.i8x16 v6 @0036 v8 = extractlane v7, 11 @0036 v9 = uextend.i32 v8 v3 -> v9 @0039 jump block1 block1: @0039 return v9 } thread '<unnamed>' panicked at 'register allocation: EntryLivein', cranelift/codegen/src/machinst/compile.rs:48:14 note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
elliottt closed issue #4736:
Bisection shows that this is a regression from #4722 (cc @elliottt), but with this input:
(module (func (param v128) (result i32) global.get 0 i16x8.extend_high_i8x16_u i8x16.extract_lane_u 11 ) (global v128 v128.const i64x2 0 0) )
this fails to compile on x86_64 with:
$ cargo run -q compile foo.wat ERROR cranelift_codegen::machinst::compile > Register allocation error for vcode VCode { Entry block: 0 v132 := v139 v135 := v137 Block 0: (original IR block: block0) (successor: Block 1) (instruction range: 0 .. 9) Inst 0: movq %rdi, %v128 Inst 1: movq %rsi, %v129 Inst 2: movdqa %xmm0, %v130 Inst 3: palignr $8, %v131, 80(%v128), %v138 Inst 4: pmovzxbw %v138, %v139 Inst 5: movdqa %v132, %v133 Inst 6: pextrb $11, %v133, %v134 Inst 7: movzbl %v134b, %v137l Inst 8: jmp label1 Block 1: (original IR block: block1) (instruction range: 9 .. 12) Inst 9: movq %v135, %v136 Inst 10: movq %v136, %rax Inst 11: ret } Error: EntryLivein CLIF for error: function u0:0(i64 vmctx, i64, i8x16) -> i32 fast { gv0 = vmctx gv1 = load.i64 notrap aligned readonly gv0+8 gv2 = load.i64 notrap aligned gv1 gv3 = vmctx stack_limit = gv2 block0(v0: i64, v1: i64, v2: i8x16): v4 -> v0 @0031 v5 = load.i8x16 notrap aligned table v0+80 @0033 v6 = uwiden_high v5 @0036 v7 = raw_bitcast.i8x16 v6 @0036 v8 = extractlane v7, 11 @0036 v9 = uextend.i32 v8 v3 -> v9 @0039 jump block1 block1: @0039 return v9 } thread '<unnamed>' panicked at 'register allocation: EntryLivein', cranelift/codegen/src/machinst/compile.rs:48:14 note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
Last updated: Oct 23 2024 at 20:03 UTC