Stream: git-wasmtime

Topic: wasmtime / issue #4313 [Cranelift] Implement scalar min/m...


view this post on Zulip Wasmtime GitHub notifications bot (Jun 24 2022 at 13:43):

sparker-arm opened issue #4313:

The CLIF operators: umin, smin, imin and imax all support scalars, as well as vectors, but AArch64 currently only implements support for vectors. The backend will panic given the scalar versions.

view this post on Zulip Wasmtime GitHub notifications bot (Jun 24 2022 at 13:43):

sparker-arm labeled issue #4313:

The CLIF operators: umin, smin, imin and imax all support scalars, as well as vectors, but AArch64 currently only implements support for vectors. The backend will panic given the scalar versions.

view this post on Zulip Wasmtime GitHub notifications bot (Jun 24 2022 at 14:59):

sparker-arm closed issue #4313:

The CLIF operators: umin, smin, imin and imax all support scalars, as well as vectors, but AArch64 currently only implements support for vectors. The backend will panic given the scalar versions.

view this post on Zulip Wasmtime GitHub notifications bot (Oct 24 2022 at 13:25):

afonso360 commented on issue #4313:

Hey, I just hit this with the fuzzer, Is there a reason as to why this is not planned?

view this post on Zulip Wasmtime GitHub notifications bot (Oct 24 2022 at 13:30):

sparker-arm commented on issue #4313:

Oh... I don't remember closing this! Considering it happened on the same day, I'm assuming I did so by accident.

view this post on Zulip Wasmtime GitHub notifications bot (Oct 24 2022 at 13:30):

sparker-arm reopened issue #4313:

The CLIF operators: umin, smin, imin and imax all support scalars, as well as vectors, but AArch64 currently only implements support for vectors. The backend will panic given the scalar versions.

view this post on Zulip Wasmtime GitHub notifications bot (Oct 24 2022 at 13:46):

sparker-arm commented on issue #4313:

Another realistic option, is that is a duplicate of another issue and I've just failed to link it.

view this post on Zulip Wasmtime GitHub notifications bot (Feb 28 2023 at 16:48):

afonso360 commented on issue #4313:

Fuzzgen just rediscovered this issue again on this CLIF input:

test compile
set opt_level=speed_and_size
target aarch64

function %a() -> i128 system_v {
block0:
    v83 = iconst.i64 0
    v0 = uextend.i128 v83  ; v83 = 0
    v80 = iconst.i64 0
    v3 = uextend.i128 v80  ; v80 = 0
    v4 = iconst.i8 0
    v6 = iconst.i64 0
    v40 = icmp slt v3, v0
    v58 = select v40, v0, v3
    v84 = iconst.i64 0
    v17 = uextend.i128 v84  ; v84 = 0
    v86 = iconst.i64 0
    v62 = uextend.i128 v86  ; v86 = 0
    brif v4, block1, block2(v0)  ; v4 = 0

block1 cold:
    brif.i64 v6, block2(v58), block2(v17)  ; v6 = 0

block2(v18: i128) cold:
    return v62
}

This is due to the rules added in #5546

view this post on Zulip Wasmtime GitHub notifications bot (Feb 28 2023 at 17:04):

afonso360 edited a comment on issue #4313:

Fuzzgen just rediscovered this issue (for i128's) again on this CLIF input:

test compile
set opt_level=speed_and_size
target aarch64

function %a() -> i128 system_v {
block0:
    v83 = iconst.i64 0
    v0 = uextend.i128 v83  ; v83 = 0
    v80 = iconst.i64 0
    v3 = uextend.i128 v80  ; v80 = 0
    v4 = iconst.i8 0
    v6 = iconst.i64 0
    v40 = icmp slt v3, v0
    v58 = select v40, v0, v3
    v84 = iconst.i64 0
    v17 = uextend.i128 v84  ; v84 = 0
    v86 = iconst.i64 0
    v62 = uextend.i128 v86  ; v86 = 0
    brif v4, block1, block2(v0)  ; v4 = 0

block1 cold:
    brif.i64 v6, block2(v58), block2(v17)  ; v6 = 0

block2(v18: i128) cold:
    return v62
}

This is due to the rules added in #5546


Last updated: Dec 23 2024 at 13:07 UTC