Stream: git-wasmtime

Topic: wasmtime / issue #3477 Cranelift: use `shld`/`shrd` in 12...

Wasmtime GitHub notifications bot (Oct 27 2021 at 00:26):

fitzgen opened issue #3477:

Right now we manually do two shls/shrs and then compute the carry bits and or them into the high half.

We could just use shld and shrd, which handle the carry bits for us.

• https://www.felixcloutier.com/x86/shld
• https://www.felixcloutier.com/x86/shrd

This is what LLVM does, fwiw: https://play.rust-lang.org/?version=stable&mode=release&edition=2021&gist=34e3a56cdaa9db7b1d5f4c429ad3db4f

Wasmtime GitHub notifications bot (Oct 27 2021 at 00:26):

fitzgen labeled issue #3477:

Right now we manually do two shls/shrs and then compute the carry bits and or them into the high half.

We could just use shld and shrd, which handle the carry bits for us.

• https://www.felixcloutier.com/x86/shld
• https://www.felixcloutier.com/x86/shrd

This is what LLVM does, fwiw: https://play.rust-lang.org/?version=stable&mode=release&edition=2021&gist=34e3a56cdaa9db7b1d5f4c429ad3db4f

Wasmtime GitHub notifications bot (Oct 27 2021 at 00:26):

fitzgen labeled issue #3477:

Right now we manually do two shls/shrs and then compute the carry bits and or them into the high half.

We could just use shld and shrd, which handle the carry bits for us.

• https://www.felixcloutier.com/x86/shld
• https://www.felixcloutier.com/x86/shrd

This is what LLVM does, fwiw: https://play.rust-lang.org/?version=stable&mode=release&edition=2021&gist=34e3a56cdaa9db7b1d5f4c429ad3db4f

Wasmtime GitHub notifications bot (Oct 27 2021 at 00:27):

cfallin commented on issue #3477:

Thanks for finding this inefficiency!

Wasmtime GitHub notifications bot (Nov 12 2021 at 04:00):

jlb6740 commented on issue #3477:

Hi @fitzgen Which lowering are you referring to? Can you point to the code sequence?

Wasmtime GitHub notifications bot (Nov 15 2021 at 18:39):

fitzgen commented on issue #3477:

@jlb6740 this sequence (and similar for shr):

https://github.com/bytecodealliance/wasmtime/blob/ea0cb971fbe666ad4360ef8280a8f398cf224edd/cranelift/codegen/src/isa/x64/lower.rs#L877

Wasmtime GitHub notifications bot (May 04 2022 at 21:01):

cfallin labeled issue #3477:

Right now we manually do two shls/shrs and then compute the carry bits and or them into the high half.

We could just use shld and shrd, which handle the carry bits for us.

• https://www.felixcloutier.com/x86/shld
• https://www.felixcloutier.com/x86/shrd

This is what LLVM does, fwiw: https://play.rust-lang.org/?version=stable&mode=release&edition=2021&gist=34e3a56cdaa9db7b1d5f4c429ad3db4f

Last updated: Oct 23 2024 at 20:03 UTC