Stream: git-wasmtime

Topic: wasmtime / issue #2217 Support RISC-V target in new backe...

Wasmtime GitHub notifications bot (Oct 01 2021 at 21:15):

akirilov-arm labeled issue #2217:

As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.

We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.

Wasmtime GitHub notifications bot (Nov 04 2021 at 16:12):

laizy commented on issue #2217:

Is there any progress on this?

Wasmtime GitHub notifications bot (Nov 04 2021 at 16:15):

cfallin commented on issue #2217:

Hi @laizy, no, unfortunately not; no one has had the time to work on this. If you or anyone else is interested in working on it, I'd be happy to mentor; it would probably be 2-3 months of fulltime work to get it to a reasonable state.

Wasmtime GitHub notifications bot (Dec 22 2021 at 04:04):

dunxen commented on issue #2217:

I'd love to try but fear I don't have the required domain knowledge here :)

Wasmtime GitHub notifications bot (Dec 27 2021 at 08:00):

yuyang-ok commented on issue #2217:

@dunxen are you working on risc-v already?

Wasmtime GitHub notifications bot (Jan 05 2022 at 13:59):

dunxen commented on issue #2217:

@dunxen are you working on risc-v already?

Hey sorry, I've been away for some time.
Unfortunately, I am not. I'm still learning about the ISA.

Wasmtime GitHub notifications bot (Mar 13 2022 at 05:12):

yuyang-ok commented on issue #2217:

I'd love to try but fear I don't have the required domain knowledge here :)

same!!

Wasmtime GitHub notifications bot (Mar 14 2022 at 15:04):

dunxen commented on issue #2217:

I'd love to try but fear I don't have the required domain knowledge here :)

same!!

I'd love to work on it but can't give an ETA at all. I'll check closer to the end of the month.

Wasmtime GitHub notifications bot (May 04 2022 at 22:53):

cfallin labeled issue #2217:

As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.

We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.

Wasmtime GitHub notifications bot (May 04 2022 at 22:53):

cfallin labeled issue #2217:

As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.

We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.

Wasmtime GitHub notifications bot (Sep 29 2022 at 08:03):

a1phyr commented on issue #2217:

I think this issue can be closed now :tada:

Wasmtime GitHub notifications bot (Sep 29 2022 at 11:07):

sanxiyn commented on issue #2217:

For the record, #4271 merged RISC-V backend.

Wasmtime GitHub notifications bot (Sep 29 2022 at 17:01):

jameysharp closed issue #2217:

As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.

We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.

Wasmtime GitHub notifications bot (Sep 29 2022 at 17:01):

jameysharp commented on issue #2217:

Yes, this is done. Hooray!

Last updated: Oct 23 2024 at 20:03 UTC