akirilov-arm labeled issue #2217:
As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.
We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.
laizy commented on issue #2217:
Is there any progress on this?
cfallin commented on issue #2217:
Hi @laizy, no, unfortunately not; no one has had the time to work on this. If you or anyone else is interested in working on it, I'd be happy to mentor; it would probably be 2-3 months of fulltime work to get it to a reasonable state.
dunxen commented on issue #2217:
I'd love to try but fear I don't have the required domain knowledge here :)
yuyang-ok commented on issue #2217:
@dunxen are you working on risc-v already?
dunxen commented on issue #2217:
@dunxen are you working on risc-v already?
Hey sorry, I've been away for some time.
Unfortunately, I am not. I'm still learning about the ISA.
yuyang-ok commented on issue #2217:
I'd love to try but fear I don't have the required domain knowledge here :)
same!!
dunxen commented on issue #2217:
I'd love to try but fear I don't have the required domain knowledge here :)
same!!
I'd love to work on it but can't give an ETA at all. I'll check closer to the end of the month.
cfallin labeled issue #2217:
As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.
We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.
cfallin labeled issue #2217:
As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.
We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.
a1phyr commented on issue #2217:
I think this issue can be closed now :tada:
sanxiyn commented on issue #2217:
For the record, #4271 merged RISC-V backend.
jameysharp closed issue #2217:
As mentioned in a reddit discussion here, we don't yet have a tracking issue for this.
We should implement a backend in the MachInst framework for RISC-V 32- and/or 64-bit platforms. It seems we had the very start of this in the old backend framework (cranelift/codegen/src/isa/riscv/) but it appears fairly skeletal.
jameysharp commented on issue #2217:
Yes, this is done. Hooray!
Last updated: Dec 23 2024 at 12:05 UTC