Stream: git-wasmtime

Topic: wasmtime / issue #1925 Collapse `load; add; store` into a...


view this post on Zulip Wasmtime GitHub notifications bot (May 04 2022 at 19:56):

cfallin commented on issue #1925:

Closing now; fixed by #4071.

view this post on Zulip Wasmtime GitHub notifications bot (May 04 2022 at 19:56):

cfallin closed issue #1925:

Right now, this

function %add(i64) {
    block0(v0: i64):
        v1 = load.i32 aligned notrap v0
        v2 = iadd_imm v1, 1
        store aligned notrap v2, v1
        return
}

compiles down into

Disassembly of 19 bytes:
   0:   40 55                   push    rbp
   2:   48 89 e5                mov rbp, rsp
   5:   40 8b 07                mov eax, dword ptr [rdi]
   8:   89 c1                   mov ecx, eax
   a:   83 c1 01                add ecx, 1
   d:   40 89 08                mov dword ptr [rax], ecx
  10:   40 5d                   pop rbp
  12:   c3                      ret

on x86-64.

I would expect it to instead generate

push rbp
mov  rbp, rsp
add  dword ptr [rdi], 1
pop  rbp
ret

but I don't think we any IR instruction handles this addressing mode right now.


Last updated: Dec 23 2024 at 12:05 UTC