Stream: git-wasmtime

Topic: wasmtime / issue #14317 assertion failed: self.value_lowe...

Wasmtime GitHub notifications bot (Sep 11 2026 at 15:37):

alexcrichton opened issue #14317:

This input:

<details>

;; Compile test case

test compile
set enable_nan_canonicalization=true
set enable_llvm_abi_extensions=true
set enable_multi_ret_implicit_sret=true
set machine_code_cfg_info=true
set enable_heap_access_spectre_mitigation=false
set enable_incremental_compilation_cache_checks=true
target x86_64 has_sse3 has_cmpxchg16b has_sse41 has_sse42 has_avx_vnni has_avx512bitalg has_avx512vl has_avx512f has_avx512vnni has_popcnt has_bmi1 has_lzcnt

function u1:0(i16 sext, f32, i64x2, i32x4, i8x16, f64x2, f32x4, i16x8, i64x2, i8, i128 uext, i64 sext, i32, i8x16, f64) preserve_all {
    ss0 = explicit_slot 126, align = 4
    ss1 = explicit_slot 126, align = 4
    ss2 = explicit_slot 126, align = 4
    ss3 = explicit_slot 4, align = 4
    ss4 = explicit_slot 16, align = 16
    ss5 = explicit_slot 16, align = 16
    ss6 = explicit_slot 16, align = 16
    ss7 = explicit_slot 16, align = 16
    ss8 = explicit_slot 16, align = 16
    region0 = 2 "vmctx"
    sig0 = () -> f32x4, f64, i16x8, f64, f64, f64, i16x8, f64, i8 sext, i16x8, i16, f64, i64, f64, f64 fast
    sig1 = (f32) -> f32 system_v
    sig2 = (f64) -> f64 system_v
    sig3 = (f32) -> f32 system_v
    sig4 = (f64) -> f64 system_v
    sig5 = (f32) -> f32 system_v
    sig6 = (f64) -> f64 system_v
    sig7 = (f32) -> f32 system_v
    sig8 = (f64) -> f64 system_v
    sig9 = (f32, f32, f32) -> f32 system_v
    sig10 = (f64, f64, f64) -> f64 system_v
    fn0 = u2:0 sig0
    fn1 = %CeilF32 sig1
    fn2 = %CeilF64 sig2
    fn3 = %FloorF32 sig3
    fn4 = %FloorF64 sig4
    fn5 = %TruncF32 sig5
    fn6 = %TruncF64 sig6
    fn7 = %NearestF32 sig7
    fn8 = %NearestF64 sig8
    fn9 = %FmaF32 sig9
    fn10 = %FmaF64 sig10

block0(v0: i16, v1: f32, v2: i64x2, v3: i32x4, v4: i8x16, v5: f64x2, v6: f32x4, v7: i16x8, v8: i64x2, v9: i8, v10: i128, v11: i64, v12: i32, v13: i8x16, v14: f64):
    v970 = stack_addr.i64 ss7
    store notrap aligned v2, v970
    v971 = stack_addr.i64 ss4
    store notrap aligned v3, v971
    v972 = stack_addr.i64 ss5
    store notrap aligned v4, v972
    v973 = stack_addr.i64 ss6
    store notrap aligned v5, v973
    v974 = stack_addr.i64 ss8
    store notrap aligned v10, v974
    v178 = iconst.i8 0
    v179 = iconst.i16 0
    v180 = iconst.i32 0
    v181 = iconst.i64 0
    v182 = uextend.i128 v181  ; v181 = 0
    v183 = stack_addr.i64 ss0
    store notrap region0 v182, v183
    v184 = stack_addr.i64 ss0+16
    store notrap region0 v182, v184
    v185 = stack_addr.i64 ss0+32
    store notrap region0 v182, v185
    v186 = stack_addr.i64 ss0+48
    store notrap region0 v182, v186
    v187 = stack_addr.i64 ss0+64
    store notrap region0 v182, v187
    v188 = stack_addr.i64 ss0+80
    store notrap region0 v182, v188
    v189 = stack_addr.i64 ss0+96
    store notrap region0 v182, v189
    v190 = stack_addr.i64 ss0+112
    store notrap region0 v181, v190  ; v181 = 0
    v191 = stack_addr.i64 ss0+120
    store notrap region0 v180, v191  ; v180 = 0
    v192 = stack_addr.i64 ss0+124
    store notrap region0 v179, v192  ; v179 = 0
    v193 = stack_addr.i64 ss1
    store notrap region0 v182, v193
    v194 = stack_addr.i64 ss1+16
    store notrap region0 v182, v194
    v195 = stack_addr.i64 ss1+32
    store notrap region0 v182, v195
    v196 = stack_addr.i64 ss1+48
    store notrap region0 v182, v196
    v197 = stack_addr.i64 ss1+64
    store notrap region0 v182, v197
    v198 = stack_addr.i64 ss1+80
    store notrap region0 v182, v198
    v199 = stack_addr.i64 ss1+96
    store notrap region0 v182, v199
    v200 = stack_addr.i64 ss1+112
    store notrap region0 v181, v200  ; v181 = 0
    v201 = stack_addr.i64 ss1+120
    store notrap region0 v180, v201  ; v180 = 0
    v202 = stack_addr.i64 ss1+124
    store notrap region0 v179, v202  ; v179 = 0
    v203 = stack_addr.i64 ss2
    store notrap region0 v182, v203
    v204 = stack_addr.i64 ss2+16
    store notrap region0 v182, v204
    v205 = stack_addr.i64 ss2+32
    store notrap region0 v182, v205
    v206 = stack_addr.i64 ss2+48
    store notrap region0 v182, v206
    v207 = stack_addr.i64 ss2+64
    store notrap region0 v182, v207
    v208 = stack_addr.i64 ss2+80
    store notrap region0 v182, v208
    v209 = stack_addr.i64 ss2+96
    store notrap region0 v182, v209
    v210 = stack_addr.i64 ss2+112
    store notrap region0 v181, v210  ; v181 = 0
    v211 = stack_addr.i64 ss2+120
    store notrap region0 v180, v211  ; v180 = 0
    v212 = stack_addr.i64 ss2+124
    store notrap region0 v179, v212  ; v179 = 0
    v213 = sshr v0, v11
    v214 = sshr v213, v11
    v215 = sshr v214, v11
    v216 = sshr v215, v11
    v217 = sshr v216, v11
    v968 = stack_addr.i64 ss8
    v969 = load.i128 notrap aligned v968
    v218 = rotr v12, v969
    v967 = stack_addr.i64 ss3
    store notrap aligned v218, v967
    v219, v220, v221, v222, v223, v224, v225, v226, v227, v228, v229, v230, v231, v232, v233 = call fn0(), stack_map=[i64x2 @ ss7+0, i32x4 @ ss4+0, i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32 @ ss3+0]
    v963 = stack_addr.i64 ss4
    v964 = load.i32x4 notrap aligned v963
    v965 = stack_addr.i64 ss4
    v966 = load.i32x4 notrap aligned v965
    v234 = smin v964, v966
    v962 = stack_addr.i64 ss4
    store notrap aligned v234, v962
    v235 = stack_addr.i64 ss1+28
    v236 = atomic_load.i64 region0 v235
    v237 = stack_addr.i64 ss1+28
    v238 = atomic_load.i64 region0 v237
    v239 = stack_addr.i64 ss1+28
    v240 = atomic_load.i64 region0 v239
    v241 = stack_addr.i64 ss1+28
    v242 = atomic_load.i64 region0 v241
    v243 = stack_addr.i64 ss1+28
    v244 = atomic_load.i64 region0 v243
    v245 = stack_addr.i64 ss1+28
    v246 = atomic_load.i64 region0 v245
    v247, v248, v249, v250, v251, v252, v253, v254, v255, v256, v257, v258, v259, v260, v261 = call fn0(), stack_map=[i64x2 @ ss7+0, i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32 @ ss3+0, i32x4 @ ss4+0]
    v958 = stack_addr.i64 ss3
    v959 = load.i32 notrap aligned v958
    v960 = stack_addr.i64 ss3
    v961 = load.i32 notrap aligned v960
    v262, v263 = smul_overflow v959, v961
    v957 = stack_addr.i64 ss3
    store notrap aligned v262, v957
    v953 = stack_addr.i64 ss7
    v954 = load.i64x2 notrap aligned v953
    v955 = stack_addr.i64 ss7
    v956 = load.i64x2 notrap aligned v955
    v264 = select v263, v954, v956
    v952 = stack_addr.i64 ss7
    store notrap aligned v264, v952
    v265 = stack_addr.i64 ss1+28
    v266 = atomic_load.i64 region0 v265
    v267 = stack_addr.i64 ss1+4
    v268 = atomic_load.i64 region0 v267
    v269, v270, v271, v272, v273, v274, v275, v276, v277, v278, v279, v280, v281, v282, v283 = call fn0(), stack_map=[i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32x4 @ ss4+0, i32 @ ss3+0, i64x2 @ ss7+0]
    v284, v285, v286, v287, v288, v289, v290, v291, v292, v293, v294, v295, v296, v297, v298 = call fn0(), stack_map=[i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32x4 @ ss4+0, i32 @ ss3+0, i64x2 @ ss7+0]
    v299 = stack_addr.i64 ss1+28
    v300 = atomic_load.i64 region0 v299
    v301 = stack_addr.i64 ss1+28
    v302 = atomic_load.i64 region0 v301
    v303 = stack_addr.i64 ss1+28
    v304 = atomic_load.i64 region0 v303
    v305 = stack_addr.i64 ss1+28
    v306 = atomic_load.i64 region0 v305
    v307 = stack_addr.i64 ss1+28
    v308 = atomic_load.i64 region0 v307
    v309 = stack_addr.i64 ss1+28
    v310 = atomic_load.i64 region0 v309
    v926 = stack_addr.i64 ss3
    v927 = load.i32 notrap aligned v926
    v928 = stack_addr.i64 ss3
    v929 = load.i32 notrap aligned v928
    v930 = stack_addr.i64 ss6
    v931 = load.f64x2 notrap aligned v930
    v932 = stack_addr.i64 ss6
    v933 = load.f64x2 notrap aligned v932
    v934 = stack_addr.i64 ss6
    v935 = load.f64x2 notrap aligned v934
    v936 = stack_addr.i64 ss6
    v937 = load.f64x2 notrap aligned v936
    v938 = stack_addr.i64 ss6
    v939 = load.f64x2 notrap aligned v938
    v940 = stack_addr.i64 ss6
    v941 = load.f64x2 notrap aligned v940
    v942 = stack_addr.i64 ss6
    v943 = load.f64x2 notrap aligned v942
    v944 = stack_addr.i64 ss5
    v945 = load.i8x16 notrap aligned v944
    v946 = stack_addr.i64 ss4
    v947 = load.i32x4 notrap aligned v946
    v948 = stack_addr.i64 ss7
    v949 = load.i64x2 notrap aligned v948
    v950 = stack_addr.i64 ss8
    v951 = load.i128 notrap aligned v950
    jump block1(v292, v927, v929, v293, v293, v293, v294, v293, v931, v933, v935, v937, v939, v941, v943, v945, v947, v949, v951)

block1(v15: i8, v16: i32, v17: i32, v18: i16x8, v19: i16x8, v20: i16x8, v21: i16, v22: i16x8, v23: f64x2, v24: f64x2, v25: f64x2, v26: f64x2, v27: f64x2, v28: f64x2, v29: f64x2, v770: i8x16, v771: i32x4, v773: i64x2, v775: i128):
    v711 -> v17
    v718 -> v17
    v721 -> v17
    v731 -> v17
    v736 -> v17
    v743 -> v17
    v750 -> v17
    v784 -> v17
    v710 -> v770
    v716 -> v770
    v723 -> v770
    v725 -> v770
    v738 -> v770
    v778 -> v770
    v791 -> v770
    v715 -> v771
    v724 -> v771
    v737 -> v771
    v746 -> v771
    v772 -> v771
    v777 -> v771
    v790 -> v771
    v717 -> v773
    v729 -> v773
    v741 -> v773
    v749 -> v773
    v774 -> v773
    v782 -> v773
    v794 -> v773
    v719 -> v775
    v732 -> v775
    v744 -> v775
    v751 -> v775
    v776 -> v775
    v785 -> v775
    v796 -> v775
    v920 = stack_addr.i64 ss3
    store notrap aligned v17, v920
    v921 = stack_addr.i64 ss8
    store notrap aligned v29, v921
    v922 = stack_addr.i64 ss7
    store notrap aligned v770, v922
    v923 = stack_addr.i64 ss4
    store notrap aligned v771, v923
    v924 = stack_addr.i64 ss5
    store notrap aligned v773, v924
    v925 = stack_addr.i64 ss6
    store notrap aligned v775, v925
    v311 = stack_addr.i64 ss1+97
    v312 = atomic_load.i64 region0 v311
    v313 = smulhi v21, v21
    v314, v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, v325, v326, v327, v328 = call fn0(), stack_map=
[message truncated]

Wasmtime GitHub notifications bot (Sep 11 2026 at 15:37):

alexcrichton added the fuzz-bug label to Issue #14317.

Wasmtime GitHub notifications bot (Sep 11 2026 at 21:03):

alexcrichton commented on issue #14317:

These might be the same issue as the above, I'm not sure, but an LLM has additionally found:

test compile
target x86_64

function %f(i64, i64, i64) -> i64, i64 {
block0(v0: i64, v1: i64, v9: i64):
  v2 = load.i64 v1
  v3, v4 = uadd_overflow v0, v2
  v5 = iadd v3, v1
  v6 = select v4, v9, v1
  return v5, v6
}

and

test compile
target x86_64

function %f(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
  v2 = load.i64 v1
  v3, v4 = uadd_overflow v0, v2
  v5 = iadd v3, v1
  brif v4, block1, block2
block1:
  return v5
block2:
  return v1
}

panic with the same error message when run through clif-util test. If it's helpful the full report is here

Wasmtime GitHub notifications bot (Sep 12 2026 at 00:18):

cfallin commented on issue #14317:

Thanks -- was on PTO today and am traveling for work next week so I may be slow but I'll try to prioritize fixing this.

Wasmtime GitHub notifications bot (Sep 14 2026 at 19:39):

cfallin closed issue #14317:

This input:

<details>

;; Compile test case

test compile
set enable_nan_canonicalization=true
set enable_llvm_abi_extensions=true
set enable_multi_ret_implicit_sret=true
set machine_code_cfg_info=true
set enable_heap_access_spectre_mitigation=false
set enable_incremental_compilation_cache_checks=true
target x86_64 has_sse3 has_cmpxchg16b has_sse41 has_sse42 has_avx_vnni has_avx512bitalg has_avx512vl has_avx512f has_avx512vnni has_popcnt has_bmi1 has_lzcnt

function u1:0(i16 sext, f32, i64x2, i32x4, i8x16, f64x2, f32x4, i16x8, i64x2, i8, i128 uext, i64 sext, i32, i8x16, f64) preserve_all {
    ss0 = explicit_slot 126, align = 4
    ss1 = explicit_slot 126, align = 4
    ss2 = explicit_slot 126, align = 4
    ss3 = explicit_slot 4, align = 4
    ss4 = explicit_slot 16, align = 16
    ss5 = explicit_slot 16, align = 16
    ss6 = explicit_slot 16, align = 16
    ss7 = explicit_slot 16, align = 16
    ss8 = explicit_slot 16, align = 16
    region0 = 2 "vmctx"
    sig0 = () -> f32x4, f64, i16x8, f64, f64, f64, i16x8, f64, i8 sext, i16x8, i16, f64, i64, f64, f64 fast
    sig1 = (f32) -> f32 system_v
    sig2 = (f64) -> f64 system_v
    sig3 = (f32) -> f32 system_v
    sig4 = (f64) -> f64 system_v
    sig5 = (f32) -> f32 system_v
    sig6 = (f64) -> f64 system_v
    sig7 = (f32) -> f32 system_v
    sig8 = (f64) -> f64 system_v
    sig9 = (f32, f32, f32) -> f32 system_v
    sig10 = (f64, f64, f64) -> f64 system_v
    fn0 = u2:0 sig0
    fn1 = %CeilF32 sig1
    fn2 = %CeilF64 sig2
    fn3 = %FloorF32 sig3
    fn4 = %FloorF64 sig4
    fn5 = %TruncF32 sig5
    fn6 = %TruncF64 sig6
    fn7 = %NearestF32 sig7
    fn8 = %NearestF64 sig8
    fn9 = %FmaF32 sig9
    fn10 = %FmaF64 sig10

block0(v0: i16, v1: f32, v2: i64x2, v3: i32x4, v4: i8x16, v5: f64x2, v6: f32x4, v7: i16x8, v8: i64x2, v9: i8, v10: i128, v11: i64, v12: i32, v13: i8x16, v14: f64):
    v970 = stack_addr.i64 ss7
    store notrap aligned v2, v970
    v971 = stack_addr.i64 ss4
    store notrap aligned v3, v971
    v972 = stack_addr.i64 ss5
    store notrap aligned v4, v972
    v973 = stack_addr.i64 ss6
    store notrap aligned v5, v973
    v974 = stack_addr.i64 ss8
    store notrap aligned v10, v974
    v178 = iconst.i8 0
    v179 = iconst.i16 0
    v180 = iconst.i32 0
    v181 = iconst.i64 0
    v182 = uextend.i128 v181  ; v181 = 0
    v183 = stack_addr.i64 ss0
    store notrap region0 v182, v183
    v184 = stack_addr.i64 ss0+16
    store notrap region0 v182, v184
    v185 = stack_addr.i64 ss0+32
    store notrap region0 v182, v185
    v186 = stack_addr.i64 ss0+48
    store notrap region0 v182, v186
    v187 = stack_addr.i64 ss0+64
    store notrap region0 v182, v187
    v188 = stack_addr.i64 ss0+80
    store notrap region0 v182, v188
    v189 = stack_addr.i64 ss0+96
    store notrap region0 v182, v189
    v190 = stack_addr.i64 ss0+112
    store notrap region0 v181, v190  ; v181 = 0
    v191 = stack_addr.i64 ss0+120
    store notrap region0 v180, v191  ; v180 = 0
    v192 = stack_addr.i64 ss0+124
    store notrap region0 v179, v192  ; v179 = 0
    v193 = stack_addr.i64 ss1
    store notrap region0 v182, v193
    v194 = stack_addr.i64 ss1+16
    store notrap region0 v182, v194
    v195 = stack_addr.i64 ss1+32
    store notrap region0 v182, v195
    v196 = stack_addr.i64 ss1+48
    store notrap region0 v182, v196
    v197 = stack_addr.i64 ss1+64
    store notrap region0 v182, v197
    v198 = stack_addr.i64 ss1+80
    store notrap region0 v182, v198
    v199 = stack_addr.i64 ss1+96
    store notrap region0 v182, v199
    v200 = stack_addr.i64 ss1+112
    store notrap region0 v181, v200  ; v181 = 0
    v201 = stack_addr.i64 ss1+120
    store notrap region0 v180, v201  ; v180 = 0
    v202 = stack_addr.i64 ss1+124
    store notrap region0 v179, v202  ; v179 = 0
    v203 = stack_addr.i64 ss2
    store notrap region0 v182, v203
    v204 = stack_addr.i64 ss2+16
    store notrap region0 v182, v204
    v205 = stack_addr.i64 ss2+32
    store notrap region0 v182, v205
    v206 = stack_addr.i64 ss2+48
    store notrap region0 v182, v206
    v207 = stack_addr.i64 ss2+64
    store notrap region0 v182, v207
    v208 = stack_addr.i64 ss2+80
    store notrap region0 v182, v208
    v209 = stack_addr.i64 ss2+96
    store notrap region0 v182, v209
    v210 = stack_addr.i64 ss2+112
    store notrap region0 v181, v210  ; v181 = 0
    v211 = stack_addr.i64 ss2+120
    store notrap region0 v180, v211  ; v180 = 0
    v212 = stack_addr.i64 ss2+124
    store notrap region0 v179, v212  ; v179 = 0
    v213 = sshr v0, v11
    v214 = sshr v213, v11
    v215 = sshr v214, v11
    v216 = sshr v215, v11
    v217 = sshr v216, v11
    v968 = stack_addr.i64 ss8
    v969 = load.i128 notrap aligned v968
    v218 = rotr v12, v969
    v967 = stack_addr.i64 ss3
    store notrap aligned v218, v967
    v219, v220, v221, v222, v223, v224, v225, v226, v227, v228, v229, v230, v231, v232, v233 = call fn0(), stack_map=[i64x2 @ ss7+0, i32x4 @ ss4+0, i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32 @ ss3+0]
    v963 = stack_addr.i64 ss4
    v964 = load.i32x4 notrap aligned v963
    v965 = stack_addr.i64 ss4
    v966 = load.i32x4 notrap aligned v965
    v234 = smin v964, v966
    v962 = stack_addr.i64 ss4
    store notrap aligned v234, v962
    v235 = stack_addr.i64 ss1+28
    v236 = atomic_load.i64 region0 v235
    v237 = stack_addr.i64 ss1+28
    v238 = atomic_load.i64 region0 v237
    v239 = stack_addr.i64 ss1+28
    v240 = atomic_load.i64 region0 v239
    v241 = stack_addr.i64 ss1+28
    v242 = atomic_load.i64 region0 v241
    v243 = stack_addr.i64 ss1+28
    v244 = atomic_load.i64 region0 v243
    v245 = stack_addr.i64 ss1+28
    v246 = atomic_load.i64 region0 v245
    v247, v248, v249, v250, v251, v252, v253, v254, v255, v256, v257, v258, v259, v260, v261 = call fn0(), stack_map=[i64x2 @ ss7+0, i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32 @ ss3+0, i32x4 @ ss4+0]
    v958 = stack_addr.i64 ss3
    v959 = load.i32 notrap aligned v958
    v960 = stack_addr.i64 ss3
    v961 = load.i32 notrap aligned v960
    v262, v263 = smul_overflow v959, v961
    v957 = stack_addr.i64 ss3
    store notrap aligned v262, v957
    v953 = stack_addr.i64 ss7
    v954 = load.i64x2 notrap aligned v953
    v955 = stack_addr.i64 ss7
    v956 = load.i64x2 notrap aligned v955
    v264 = select v263, v954, v956
    v952 = stack_addr.i64 ss7
    store notrap aligned v264, v952
    v265 = stack_addr.i64 ss1+28
    v266 = atomic_load.i64 region0 v265
    v267 = stack_addr.i64 ss1+4
    v268 = atomic_load.i64 region0 v267
    v269, v270, v271, v272, v273, v274, v275, v276, v277, v278, v279, v280, v281, v282, v283 = call fn0(), stack_map=[i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32x4 @ ss4+0, i32 @ ss3+0, i64x2 @ ss7+0]
    v284, v285, v286, v287, v288, v289, v290, v291, v292, v293, v294, v295, v296, v297, v298 = call fn0(), stack_map=[i8x16 @ ss5+0, f64x2 @ ss6+0, i128 @ ss8+0, i32x4 @ ss4+0, i32 @ ss3+0, i64x2 @ ss7+0]
    v299 = stack_addr.i64 ss1+28
    v300 = atomic_load.i64 region0 v299
    v301 = stack_addr.i64 ss1+28
    v302 = atomic_load.i64 region0 v301
    v303 = stack_addr.i64 ss1+28
    v304 = atomic_load.i64 region0 v303
    v305 = stack_addr.i64 ss1+28
    v306 = atomic_load.i64 region0 v305
    v307 = stack_addr.i64 ss1+28
    v308 = atomic_load.i64 region0 v307
    v309 = stack_addr.i64 ss1+28
    v310 = atomic_load.i64 region0 v309
    v926 = stack_addr.i64 ss3
    v927 = load.i32 notrap aligned v926
    v928 = stack_addr.i64 ss3
    v929 = load.i32 notrap aligned v928
    v930 = stack_addr.i64 ss6
    v931 = load.f64x2 notrap aligned v930
    v932 = stack_addr.i64 ss6
    v933 = load.f64x2 notrap aligned v932
    v934 = stack_addr.i64 ss6
    v935 = load.f64x2 notrap aligned v934
    v936 = stack_addr.i64 ss6
    v937 = load.f64x2 notrap aligned v936
    v938 = stack_addr.i64 ss6
    v939 = load.f64x2 notrap aligned v938
    v940 = stack_addr.i64 ss6
    v941 = load.f64x2 notrap aligned v940
    v942 = stack_addr.i64 ss6
    v943 = load.f64x2 notrap aligned v942
    v944 = stack_addr.i64 ss5
    v945 = load.i8x16 notrap aligned v944
    v946 = stack_addr.i64 ss4
    v947 = load.i32x4 notrap aligned v946
    v948 = stack_addr.i64 ss7
    v949 = load.i64x2 notrap aligned v948
    v950 = stack_addr.i64 ss8
    v951 = load.i128 notrap aligned v950
    jump block1(v292, v927, v929, v293, v293, v293, v294, v293, v931, v933, v935, v937, v939, v941, v943, v945, v947, v949, v951)

block1(v15: i8, v16: i32, v17: i32, v18: i16x8, v19: i16x8, v20: i16x8, v21: i16, v22: i16x8, v23: f64x2, v24: f64x2, v25: f64x2, v26: f64x2, v27: f64x2, v28: f64x2, v29: f64x2, v770: i8x16, v771: i32x4, v773: i64x2, v775: i128):
    v711 -> v17
    v718 -> v17
    v721 -> v17
    v731 -> v17
    v736 -> v17
    v743 -> v17
    v750 -> v17
    v784 -> v17
    v710 -> v770
    v716 -> v770
    v723 -> v770
    v725 -> v770
    v738 -> v770
    v778 -> v770
    v791 -> v770
    v715 -> v771
    v724 -> v771
    v737 -> v771
    v746 -> v771
    v772 -> v771
    v777 -> v771
    v790 -> v771
    v717 -> v773
    v729 -> v773
    v741 -> v773
    v749 -> v773
    v774 -> v773
    v782 -> v773
    v794 -> v773
    v719 -> v775
    v732 -> v775
    v744 -> v775
    v751 -> v775
    v776 -> v775
    v785 -> v775
    v796 -> v775
    v920 = stack_addr.i64 ss3
    store notrap aligned v17, v920
    v921 = stack_addr.i64 ss8
    store notrap aligned v29, v921
    v922 = stack_addr.i64 ss7
    store notrap aligned v770, v922
    v923 = stack_addr.i64 ss4
    store notrap aligned v771, v923
    v924 = stack_addr.i64 ss5
    store notrap aligned v773, v924
    v925 = stack_addr.i64 ss6
    store notrap aligned v775, v925
    v311 = stack_addr.i64 ss1+97
    v312 = atomic_load.i64 region0 v311
    v313 = smulhi v21, v21
    v314, v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, v325, v326, v327, v328 = call fn0(), stack_map=[i32
[message truncated]

Last updated: Sep 20 2026 at 18:08 UTC