Stream: git-wasmtime

Topic: wasmtime / issue #12195 Cranelift: [RISC-V] ISLE panic "n...

Wasmtime GitHub notifications bot (Dec 21 2025 at 07:32):

abc767234318 opened issue #12195:

.clif Test Case

test run

set enable_nan_canonicalization=true
set preserve_frame_pointers=true
set enable_multi_ret_implicit_sret=true
set opt_level=none

target x86_64 sse42 has_avx
target aarch64
target s390x
target riscv64gc has_zcd has_zbkb has_zbc has_zbs has_zicond has_zvl32b has_zvl64b has_zvl128b has_zvl1024b has_zvl2048b has_zvl4096b has_zvl8192b has_zvl16384b has_zvl32768b


function %main() -> i32 fast {
    ss0 = explicit_slot 32
    ss1 = explicit_slot 32

    const0 = 0x80120a07e77f0b800307097f800f0c80
    const1 = 0x08f7ed6b8000fd4410338000e9c7ed37
    const2 = 0x16605661f08ec7fb1c1e09757fffffff
    const3 = 0xf34659d759e0e61f149d1c36b96d5cef
    const4 = 0xf9d45846788bf825707b7b78faa77803
    const5 = 0xff7fffff470daf3cc6b13a1ec6a59632
    const6 = 0x7fefffffffffffff7e22b6eb71612c9c

block0:
    v2 = iconst.i32 0x045a_3c7e
    v3 = iconst.i8 12
    v4 = iconst.i16 -32768
    v5 = iconst.i32 0x045a_3c7e
    v6 = iconst.i64 0x0941_7134_f9cf_25f0
    v7 = iconst.i64 0x7fff_ffff_ffff_ffff
    v8 = uextend.i128 v7  ; v7 = 0x7fff_ffff_ffff_ffff
    v9 = f16const -0x1.b28p14
    v10 = f32const 0x1.6d1048p99
    v11 = f64const 0x1.560a7502b515cp996
    v12 = vconst.i8x16 const0
    v16 = vconst.f16x8 const4
    v17 = vconst.f32x4 const5
    v19 = stack_addr.i64 ss0
    v20 = stack_addr.i64 ss1
    store little v6, v19  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v19+8  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20+8  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v19+16  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20+16  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v19+24  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20+24  ; v6 = 0x0941_7134_f9cf_25f0
    v21 = sqrt v11  ; v11 = 0x1.560a7502b515cp996
    v22 = bitcast.i128 little v16  ; v16 = const4
    v23 = bnot v3  ; v3 = 12
    jump block17

block1:
    return v5

block6:
    v31 = rotl.i16 v4, v6  ; v4 = -32768, v6 = 0x0941_7134_f9cf_25f0
    v32 = fdiv.f64 v25, v11  ; v11 = 0x1.560a7502b515cp996
    v33 = bnot.i128 v22
    jump block7(v17, v6, v33)  ; v17 = const5, v6 = 0x0941_7134_f9cf_25f0

block7(v61: f32x4, v62: i64, v63: i128):
    jump block1

block17:
    v24 = swizzle v12, v12  ; v12 = const0, v12 = const0
    v25 = fmax.f64 v11, v21  ; v11 = 0x1.560a7502b515cp996
    v26 = sshr.i8 v23, v4  ; v4 = -32768
    jump block13(v5)  ; v5 = 0x045a_3c7e

block13(v60: i32):
    br_table v60, block6, [block7(v17, v6, v22)]
    ; jump block6
    ; jump block7(v17, v6, v22)
}

; print: %main()

I found that this case may not be just a 'not implemented' issue. This error appeared in the block13. When I use the br_table as jump instruction, it outputs the following error:

internal error: entered unreachable code: no rule matched for term gen_bitcast at src/isa/riscv64/inst.isle line 2999; should it be partial?
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace

And if I use the jump block6 or jump block7(v17, v6, v22), it can correctly output the value of v5:

%main() -> 73022590

Steps to Reproduce

My command is:

qemu-riscv64 -cpu rv64,v=true,zba=true,vlen=128,zfhmin=true -L clif-util run -v ./test.clif

Wasmtime GitHub notifications bot (Dec 21 2025 at 07:32):

abc767234318 added the bug label to Issue #12195.

Wasmtime GitHub notifications bot (Dec 21 2025 at 07:32):

abc767234318 added the cranelift label to Issue #12195.

Wasmtime GitHub notifications bot (Dec 22 2025 at 16:27):

alexcrichton added the cranelift:area:riscv64 label to Issue #12195.

Wasmtime GitHub notifications bot (Jul 18 2026 at 08:33):

afonso360 commented on issue #12195:

Hey, I took a look at this and reduced it down to

test compile precise-output
target riscv64gc has_v


function %main() -> i32 fast {
    const4 = 0xf9d45846788bf825707b7b78faa77803

block0:
    v5 = iconst.i32 0
    v16 = vconst.f16x8 const4
    v22 = bitcast.i128 little v16
    v3 = iconst.i8 12
    v99 = sextend.i32 v3
    br_table v99, block6, [block7(v16, v5, v22)]

block1:
    return v5

block6:
    v33 = bnot.i128 v22
    jump block7(v16, v5, v33)

block7(v61: f16x8, v62: i32, v63: i128):
    return v5
}

The main issue here is that we are trying to bitcast f16x8 to i128 with only the base V extension, which does not support f16 types.

Enabling the has_zvfh extension (f16 support for vectors) then we run into another issue, but I'm working on a small fix for that.

In general f16 support for RISC-V is not very complete, but if you run into more bugs let me know!

There is a separate note here, that we probably don't actually need f16 support for this particular input, but in general using f16 values without f16 support is dicey.

Wasmtime GitHub notifications bot (Oct 09 2026 at 19:21):

cfallin closed issue #12195:

.clif Test Case

test run

set enable_nan_canonicalization=true
set preserve_frame_pointers=true
set enable_multi_ret_implicit_sret=true
set opt_level=none

target x86_64 sse42 has_avx
target aarch64
target s390x
target riscv64gc has_zcd has_zbkb has_zbc has_zbs has_zicond has_zvl32b has_zvl64b has_zvl128b has_zvl1024b has_zvl2048b has_zvl4096b has_zvl8192b has_zvl16384b has_zvl32768b


function %main() -> i32 fast {
    ss0 = explicit_slot 32
    ss1 = explicit_slot 32

    const0 = 0x80120a07e77f0b800307097f800f0c80
    const1 = 0x08f7ed6b8000fd4410338000e9c7ed37
    const2 = 0x16605661f08ec7fb1c1e09757fffffff
    const3 = 0xf34659d759e0e61f149d1c36b96d5cef
    const4 = 0xf9d45846788bf825707b7b78faa77803
    const5 = 0xff7fffff470daf3cc6b13a1ec6a59632
    const6 = 0x7fefffffffffffff7e22b6eb71612c9c

block0:
    v2 = iconst.i32 0x045a_3c7e
    v3 = iconst.i8 12
    v4 = iconst.i16 -32768
    v5 = iconst.i32 0x045a_3c7e
    v6 = iconst.i64 0x0941_7134_f9cf_25f0
    v7 = iconst.i64 0x7fff_ffff_ffff_ffff
    v8 = uextend.i128 v7  ; v7 = 0x7fff_ffff_ffff_ffff
    v9 = f16const -0x1.b28p14
    v10 = f32const 0x1.6d1048p99
    v11 = f64const 0x1.560a7502b515cp996
    v12 = vconst.i8x16 const0
    v16 = vconst.f16x8 const4
    v17 = vconst.f32x4 const5
    v19 = stack_addr.i64 ss0
    v20 = stack_addr.i64 ss1
    store little v6, v19  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v19+8  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20+8  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v19+16  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20+16  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v19+24  ; v6 = 0x0941_7134_f9cf_25f0
    store little v6, v20+24  ; v6 = 0x0941_7134_f9cf_25f0
    v21 = sqrt v11  ; v11 = 0x1.560a7502b515cp996
    v22 = bitcast.i128 little v16  ; v16 = const4
    v23 = bnot v3  ; v3 = 12
    jump block17

block1:
    return v5

block6:
    v31 = rotl.i16 v4, v6  ; v4 = -32768, v6 = 0x0941_7134_f9cf_25f0
    v32 = fdiv.f64 v25, v11  ; v11 = 0x1.560a7502b515cp996
    v33 = bnot.i128 v22
    jump block7(v17, v6, v33)  ; v17 = const5, v6 = 0x0941_7134_f9cf_25f0

block7(v61: f32x4, v62: i64, v63: i128):
    jump block1

block17:
    v24 = swizzle v12, v12  ; v12 = const0, v12 = const0
    v25 = fmax.f64 v11, v21  ; v11 = 0x1.560a7502b515cp996
    v26 = sshr.i8 v23, v4  ; v4 = -32768
    jump block13(v5)  ; v5 = 0x045a_3c7e

block13(v60: i32):
    br_table v60, block6, [block7(v17, v6, v22)]
    ; jump block6
    ; jump block7(v17, v6, v22)
}

; print: %main()

I found that this case may not be just a 'not implemented' issue. This error appeared in the block13. When I use the br_table as jump instruction, it outputs the following error:

internal error: entered unreachable code: no rule matched for term gen_bitcast at src/isa/riscv64/inst.isle line 2999; should it be partial?
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace

And if I use the jump block6 or jump block7(v17, v6, v22), it can correctly output the value of v5:

%main() -> 73022590

Steps to Reproduce

My command is:

qemu-riscv64 -cpu rv64,v=true,zba=true,vlen=128,zfhmin=true -L clif-util run -v ./test.clif

Last updated: Oct 11 2026 at 02:20 UTC