akldc opened issue #10921:
.clifTest Casetest optimize set opt_level=none set preserve_frame_pointers=true set enable_multi_ret_implicit_sret=true target aarch64 function %main() -> f64 fast { block0: v1 = f64const 0x1.11044b092d153p-1 v2 = bxor.f64 v1, v1 return v2 } ; print: %main()When run on aarch64, the test case shows the following error:
thread 'main' panicked at cranelift/codegen/src/isa/aarch64/inst/emit.rs:97:5: assertion `left == right` failed left: Float right: Int note: run with `RUST_BACKTRACE=1` environment variable to display a backtraceEnvironment
qemu-aarch64to emulate execution on an x86 machine.
akldc added the bug label to Issue #10921.
akldc added the cranelift label to Issue #10921.
bjorn3 commented on issue #10921:
This should result in a verifier error if you enable the ir verifier.
akldc commented on issue #10921:
@bjorn3
It runs correctly on other architectures (after modifying the target).[x86 ] %main() -> 0.0 [riscv64] %main() -> 0.0 [aarch64] thread 'main' panicked at cranelift/codegen/src/isa/aarch64/inst/emit.rs:97:5: assertion `left == right` failed left: Float right: Int note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
bjorn3 commented on issue #10921:
Indeed. Didn't know bitwise operations were also allowed on floats.
alexcrichton added the cranelift:area:aarch64 label to Issue #10921.
alexcrichton closed issue #10921:
.clifTest Casetest optimize set opt_level=none set preserve_frame_pointers=true set enable_multi_ret_implicit_sret=true target aarch64 function %main() -> f64 fast { block0: v1 = f64const 0x1.11044b092d153p-1 v2 = bxor.f64 v1, v1 return v2 } ; print: %main()When run on aarch64, the test case shows the following error:
thread 'main' panicked at cranelift/codegen/src/isa/aarch64/inst/emit.rs:97:5: assertion `left == right` failed left: Float right: Int note: run with `RUST_BACKTRACE=1` environment variable to display a backtraceEnvironment
qemu-aarch64to emulate execution on an x86 machine.
Last updated: Dec 06 2025 at 06:05 UTC