MarinPostma opened PR #9987 from MarinPostma:winc-x64-atomic-store
to bytecodealliance:main
:
This PR implements x64 store operations:
i32.atomic.store8
i32.atomic.store16
i32.atomic.store
i64.atomic.store8
i64.atomic.store16
i64.atomic.store32
i64.atomic.store
MarinPostma requested wasmtime-compiler-reviewers for a review on PR #9987.
MarinPostma requested fitzgen for a review on PR #9987.
MarinPostma requested wasmtime-core-reviewers for a review on PR #9987.
github-actions[bot] commented on PR #9987:
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MarinPostma updated PR #9987.
saulecabrera submitted PR review:
One thing that we might want to do as part of this change before proceeding further with the development of the rest of the instructions in the proposal, is to ensure that addresses are aligned for atomic loads/stores. See the alignment of the proposal.
To check for alignment, I'd recommend creating a new method in the
CodeGen
module (e.g.,emit_check_alignment
) and either calling it before callingemit_compute_heap_addr
or enhancingemit_compute_heap_addr
to check alignment internally if the load/store is atomic.For reference, this is how alignment is handled in Cranelift.
saulecabrera created PR review comment:
// To stay consistent with cranelift, we emit a normal store followed by a mfence,
saulecabrera submitted PR review:
One thing that we might want to do as part of this change before proceeding further with the development of the rest of the instructions in the proposal, is to ensure that addresses are aligned for atomic loads/stores. See the alignment section of the proposal.
To check for alignment, I'd recommend creating a new method in the
CodeGen
module (e.g.,emit_check_alignment
) and either calling it before callingemit_compute_heap_addr
or enhancingemit_compute_heap_addr
to check alignment internally if the load/store is atomic.For reference, this is how alignment is handled in Cranelift.
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
MarinPostma commented on PR #9987:
@saulecabrera I have added the align check
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
saulecabrera submitted PR review.
saulecabrera created PR review comment:
Generally in the codegen module, we try to stick with the
emit_*
prefix, for consistency, could you update the name of this method?
saulecabrera created PR review comment:
What do you think of either:
- Passing an enum here describing the type of heap address computation: (
HeapAddress::AlignChecked
,HeapAddress::AlignUnchecked
)- Creating a wrapper method
emit_compute_heap_address_align_checked
, which internally callsemit_check_align
andemit_compute_heap_address
?Heap address calculation is a very critical piece of the compiler, so I'd recommend against passing boolean params, to make it less error prone at call sites.
saulecabrera created PR review comment:
I believe you could use a scratch register here? (
scratch!(M)
)
saulecabrera created PR review comment:
One thing to note with using
self.context.pop_to_reg
is that this method needs to ensure that the value is pushed back to the value stack after all the checks are emitted, to ensure thatemit_compute_heap_address
is able to pop the address.
saulecabrera created PR review comment:
I'd recommend using
self.context.pop_to_reg
, which already handles all the cases for moving a value to a register; e.g., in this case if a the value is already a register, this code will emit a move, which could be avoided, and more importantly it'll reduce register pressure.
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
saulecabrera submitted PR review:
Looks good, thanks!
After the trailing comment is deleted, we can land this one.
saulecabrera created PR review comment:
MarinPostma updated PR #9987.
MarinPostma commented on PR #9987:
@saulecabrera it's not working yet I had to move to a x86 machine to debug, I'll ping you when i fixed it
MarinPostma submitted PR review.
MarinPostma created PR review comment:
I'm a bit worried about the risk of clobbering the a scratch register here. The register is used across multiple masm operation, and we do use scratch registers in masm often.
MarinPostma submitted PR review.
MarinPostma created PR review comment:
I've been playing around with that, but it turns out that we need to move the address to a register anyway, because we potentially need to add the
offset
to theaddr
, and we cannot do that with theaddr
as adst
, as we need the address intact for computing the heap address later on. The reason why we can't add withtmp
as a dst, is because that will return aInvalidTwoArgumentForm
.In light of this, I think peeking and moving to
tmp
would save amov
in the case where we need to compute the offset. WDYT?
MarinPostma updated PR #9987.
MarinPostma commented on PR #9987:
@saulecabrera, I have made the changes you requested, I also responded to your comments, let me know if you want me to make the changes I suggested in the comments instead.
saulecabrera submitted PR review.
saulecabrera created PR review comment:
Oh that's a good point yeah. My main concern with
peek
is that nothing is preventing any other method to accidentally pop the wrong value from the stack. However, since this pattern is local to this method, I don't think there's a huge risk, so yeah, let's try the peek approach. One comment to your original implementation, could you return an error instead of doingpeek().unwrap()
? We haveCodeGenError::missing_values_in_stack
for this kind of situation.
MarinPostma updated PR #9987.
MarinPostma updated PR #9987.
MarinPostma commented on PR #9987:
@saulecabrera I made the final changes
saulecabrera merged PR #9987.
Last updated: Jan 24 2025 at 00:11 UTC