beetrees opened PR #9495 from beetrees:x64-better-atomics
to bytecodealliance:main
:
xchg
andlock xadd
can be used in all cases forXchg
,Add
andSub
, while variouslock
-prefixed arithmetic instructions can be used forAdd
,Sub
,And
,Or
andXor
if the result value ofatomic_rmw
(the old value) isn't used.Closes #2153
beetrees requested abrown for a review on PR #9495.
beetrees requested wasmtime-compiler-reviewers for a review on PR #9495.
abrown submitted PR review:
Thanks for the PR! This looks fine to me but I'm going to ask @cfallin to double-check a couple spots below.
abrown created PR review comment:
I believe this is correct but @cfallin do you want to double-check?
abrown created PR review comment:
Another note for @cfallin to check: this does in fact do what we would expect it to?
cfallin submitted PR review:
Thanks!
cfallin created PR review comment:
We try to avoid any
..
here so we don't miss new fields being added. Could we instead dolock: _
?
cfallin created PR review comment:
Now that we don't use all
MachAtomicRmwOp
options in lowerings anymore, could we define a separate enum for x64 and translate into it at the rule-match step, so we don't have this problem of representable but invalid combinations?
cfallin created PR review comment:
Likewise here
cfallin created PR review comment:
Looks right to me!
cfallin created PR review comment:
Likewise here
cfallin created PR review comment:
Yes, I think so! We're doing a backward pass so we know for sure if a value is used or not, and this helper looks like it was added to be used for a similar purpose in a few other backends; perfectly valid to use it here to know if we can avoid producing the result.
beetrees updated PR #9495.
beetrees submitted PR review.
beetrees created PR review comment:
I've replaced
MachAtomicRmwOp
with the more specificAtomicRmwSeqOp
andAtomic128RmwSeqOp
. I then deletedMachAtomicRmwOp
as it was now unused and essentially a duplicate ofAtomicRmwOp
.
abrown merged PR #9495.
Last updated: Dec 23 2024 at 12:05 UTC