afonso360 opened PR #9084 from afonso360:riscv-refactor-float
to bytecodealliance:main
:
:wave: Hey,
This is a refactor to the floating point instruction emission code for RISC-V.
All FP instructions include a 2 bit field that denotes the width of the arguments, from FP16 up to FP128. In the current code that is part of the opcode, and we replicate opcodes between FP32 and FP64.
With this PR we now encode the width on a separate field, and make the opcodes width agnostic, which should simplify the introduction of FP16 and FP128 instructions.
There shouldn't be any bytecode changes with this PR. The one formatting change we have is due to us previously hiding the selected FRM mode for
fcvt.d.{w,wu}
instructions, which shouldn't have been hidden since, we don't do the same for theirfcvt.s
variants. Additionally these instructions change their results based on FRM so we should probably show it anyway.
afonso360 requested wasmtime-compiler-reviewers for a review on PR #9084.
afonso360 requested elliottt for a review on PR #9084.
afonso360 updated PR #9084.
afonso360 edited PR #9084:
:wave: Hey,
This is a refactor to the floating point instruction emission code for RISC-V.
All FP instructions include a 2 bit field that denotes the width of the arguments, from FP16 up to FP128. In the current code that is part of the opcode, and we duplicate opcodes between FP32 and FP64.
With this PR we now encode the width on a separate field, and make the opcodes width agnostic, which should simplify the introduction of FP16 and FP128 instructions.
There shouldn't be any bytecode changes with this PR. The one formatting change we have is due to us previously hiding the selected FRM mode for
fcvt.d.{w,wu}
instructions, which shouldn't have been hidden since, we don't do the same for theirfcvt.s
variants. Additionally these instructions change their results based on FRM so we should probably show it anyway.
github-actions[bot] commented on PR #9084:
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alexcrichton submitted PR review.
alexcrichton merged PR #9084.
Last updated: Dec 23 2024 at 12:05 UTC