elliottt opened PR #8405 from elliottt:trevor/tail-callee-saves-riscv64 to bytecodealliance:main:
Switch to using the same set of callee saved registers as the default calling convention on riscv64. This also introduces the contraint that indirect tail calls store their destination in x5, which was an assumption of indirect calls before, but not indirect return calls.
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elliottt requested cfallin for a review on PR #8405.
elliottt requested wasmtime-compiler-reviewers for a review on PR #8405.
elliottt requested jameysharp for a review on PR #8405.
elliottt edited PR #8405:
Switch to using the same set of callee saved registers as the default calling convention on riscv64. This also introduces the contraint that indirect tail calls store their destination in
t0, which was an assumption of indirect calls before, but not indirect return calls.<!--
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elliottt updated PR #8405.
jameysharp submitted PR review:
I believe this is correct for the same reasons as similar changes to aarch64, as discussed in https://github.com/bytecodealliance/wasmtime/pull/8406#pullrequestreview-2010186633.
elliottt merged PR #8405.
Last updated: Jan 10 2026 at 02:36 UTC