uweigand opened PR #7978 from uweigand:reloc-offset
to bytecodealliance:main
:
When emitting a call to __tls_get_offset, the instruction needs to carry two relocations, a R_390_PLT32DBL targeting __tls_get_offset and a R_390_TLS_GDCALL targeting the TLS symbol. Specifically, the system linker expects to see these two relocation in that order.
However, the cranelift backend currently emits the relocations in reverse order - this unfortunately causes the linker to corrupt the instruction sequence when performing a TLS relaxation.
To fix this in the backend, I need support in machinst common code to emit a relocation at some offset to the instruction about to be emitted (e.g. the relocation should target two bytes into the 6-byte instruction that will be emitted next). I've added a new routine add_reloc_at_offset to that effect. This also allowed to simplify some existing code in the backend.
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uweigand requested abrown for a review on PR #7978.
uweigand requested wasmtime-compiler-reviewers for a review on PR #7978.
bjorn3 submitted PR review.
bjorn3 created PR review comment:
Shouldn't both relocs be printed here?
uweigand updated PR #7978.
uweigand submitted PR review.
uweigand created PR review comment:
Good point. I've fixed the disassembler to print multiple relocs on a single insn if present.
abrown submitted PR review:
Makes sense to me.
abrown merged PR #7978.
Last updated: Dec 23 2024 at 12:05 UTC