Stream: git-wasmtime

Topic: wasmtime / PR #7030 riscv64: Add more compressed instruct...

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 18:53):

afonso360 opened PR #7030 from afonso360:riscv-ca to bytecodealliance:main:

:wave: Hey,

This PR adds two new compressed instruction formats. CA and CJ. These are used for some register-register arithmetic ops (CA) and jump instructions (CJ).

It also changes all instructions that use a Label, StackMap or Relocation to use emit_uncompressed to ensure that we don't wrongly compress a instruction when it is expecting a different type of label or relocation.

Capstone seems to not recognize c.jr ra as c.ret, but it is technically an alias as far as I understand it.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 18:53):

afonso360 requested fitzgen for a review on PR #7030.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 18:53):

afonso360 requested wasmtime-compiler-reviewers for a review on PR #7030.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 19:19):

afonso360 updated PR #7030.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 19:27):

afonso360 updated PR #7030.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 21:53):

alexcrichton submitted PR review:

Looks good :+1:

Question though: is it possible to remove the usage of emit_uncompressed? It seems like the usage here is primarily related to relocations and how PCRelHi20 for example expects a 4-byte instruction. Are there alternative relocations for the 16-bit compressed instructions we could use instead with some refactoring? Or is this matching what other compilers do where for these constructs uncompressed instructions are always emitted?

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 21:53):

alexcrichton submitted PR review:

Looks good :+1:

Question though: is it possible to remove the usage of emit_uncompressed? It seems like the usage here is primarily related to relocations and how PCRelHi20 for example expects a 4-byte instruction. Are there alternative relocations for the 16-bit compressed instructions we could use instead with some refactoring? Or is this matching what other compilers do where for these constructs uncompressed instructions are always emitted?

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 21:53):

alexcrichton created PR review comment:

Oh wow this is something else... I'm curious but do you know if there's a link explaining why the bits are this way? Mostly I'm just curious!

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 22:25):

cfallin submitted PR review.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 22:25):

cfallin created PR review comment:

There's some discussion of this in Andrew Waterman's PhD thesis (his thesis work was the ISA design) -- e.g. on page 31 of that PDF he discusses how certain immediate bits always come from the same position in instruction formats and this reduces MUX logic overhead. Kind of a fascinating design point actually (how few gates can you use for an RV32I implementation).

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 22:57):

alexcrichton submitted PR review.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 13 2023 at 22:57):

alexcrichton created PR review comment:

Whoa wild! I've got some reading ahead of me :)

view this post on Zulip Wasmtime GitHub notifications bot (Sep 14 2023 at 12:04):

afonso360 updated PR #7030.

view this post on Zulip Wasmtime GitHub notifications bot (Sep 15 2023 at 09:49):

afonso360 merged PR #7030.

Last updated: Dec 23 2024 at 12:05 UTC