afonso360 opened PR #6975 from afonso360:riscv-check-ext
to bytecodealliance:main
:
:wave: Hey,
This PR Is a follow up to #6955 where @alexcrichton suggested that we check that all the flags the backend currently expects.
Most of the backend does not even check these flags, so to avoid emitting instructions where there is no support for them, we reject building the ISA when they aren't present..
This PR also renames the
INSTRUCTION_SIZE
constant to something more suitable, since we are going to have varying instruction lengths.
afonso360 requested cfallin for a review on PR #6975.
afonso360 requested wasmtime-compiler-reviewers for a review on PR #6975.
afonso360 edited PR #6975:
:wave: Hey,
This PR Is a follow up to #6955 where @alexcrichton suggested that we check that all the flags the backend currently expects.
Most of the backend does not even check these flags, so to avoid emitting instructions where there is no support for them, we reject building the ISA when they aren't present.
This PR also renames the
INSTRUCTION_SIZE
constant to something more suitable, since we are going to have varying instruction lengths.
bjorn3 submitted PR review.
bjorn3 created PR review comment:
"The RISC-V Backend currently requires all the features in the G Extension enabled".into(),
In the future it should be possible to add support for more restricted feature sets, right?
afonso360 submitted PR review.
afonso360 created PR review comment:
Oh yeah, we should be able to reduce, ideally all the way until RV64I which is just the 37 base instructions!
afonso360 updated PR #6975.
afonso360 edited PR review comment.
afonso360 updated PR #6975.
alexcrichton submitted PR review.
afonso360 merged PR #6975.
Last updated: Nov 22 2024 at 16:03 UTC