afonso360 opened PR #6949 from afonso360:fuzzgen-enable-riscv-simd to bytecodealliance:main:
:wave: Hey,
This PR enables fuzzing SIMD instructions for the RISC-V backend. This is the only backend that requires a extension (
has_v) for SIMD to work, so we need to check that it has been enabled before allowing SIMD types and instructions.I've ran this for a while with
icacheand It's no longer crashing. But I haven't been able to runfuzzgenvery well since I don't have a machine with the V extension, and running it with QEMU is quite slow.
afonso360 requested wasmtime-fuzz-reviewers for a review on PR #6949.
afonso360 requested alexcrichton for a review on PR #6949.
afonso360 requested abrown for a review on PR #6949.
afonso360 requested wasmtime-compiler-reviewers for a review on PR #6949.
alexcrichton submitted PR review:
:tada:
afonso360 merged PR #6949.
Last updated: Dec 13 2025 at 19:03 UTC