Stream: git-wasmtime

Topic: wasmtime / PR #6939 cranelift-interpreter: Fix SIMD shift...

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 11:28):

afonso360 opened PR #6939 from afonso360:fuzz-more-ops to bytecodealliance:main:

:wave: Hey,

This PR fixes the ishl/{s,u}shr instructions for SIMD in the interpreter. The main issue is that while the LHS is a vector the RHS is a scalar and that was causing issues. The solution is to splat the RHS into a similar sized vector and perform the normal operation individually.

This PR also enables these operations in fuzzgen. As well as ineg (fixed in #6844) and bitselect with floats (which was working previously)

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 11:28):

afonso360 requested jameysharp for a review on PR #6939.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 11:28):

afonso360 requested wasmtime-compiler-reviewers for a review on PR #6939.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 11:29):

afonso360 edited PR #6939:

:wave: Hey,

This PR fixes the ishl/{s,u}shr/rot{r,l} instructions for SIMD in the interpreter. The main issue is that while the LHS is a vector the RHS is a scalar and that was causing issues. The solution is to splat the RHS into a similar sized vector and perform the normal operation individually.

This PR also enables these operations in fuzzgen. As well as ineg (fixed in #6844) and bitselect with floats (which was working previously)

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 11:29):

afonso360 edited PR #6939:

:wave: Hey,

This PR fixes the ishl/{s,u}shr/rot{r,l} instructions for SIMD in the interpreter. The main issue is that while the LHS is a vector the RHS is a scalar and by default we perform the operations lanewise. The solution is to splat the RHS into a similar sized vector and perform the normal operation individually.

This PR also enables these operations in fuzzgen. As well as ineg (fixed in #6844) and bitselect with floats (which was working previously)

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 13:05):

afonso360 updated PR #6939.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 16:17):

jameysharp submitted PR review:

I like this approach and also it's always nice to enable more in fuzzgen. Thanks!

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 16:17):

jameysharp submitted PR review:

I like this approach and also it's always nice to enable more in fuzzgen. Thanks!

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 16:17):

jameysharp created PR review comment:

Not important but I think I'd find it easier to understand this match arm (and similar ones below) if written this way:

                    &[I8X16 | I16X8 | I32X4 | I64X2, I128]

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 16:28):

afonso360 updated PR #6939.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 16:28):

afonso360 has enabled auto merge for PR #6939.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 31 2023 at 17:56):

afonso360 merged PR #6939.

Last updated: Nov 22 2024 at 16:03 UTC