Stream: git-wasmtime

Topic: wasmtime / PR #6920 riscv64: Implement vector floating po...

view this post on Zulip Wasmtime GitHub notifications bot (Aug 28 2023 at 14:06):

afonso360 opened PR #6920 from afonso360:riscv-simd-float-round to bytecodealliance:main:

:wave: Hey,

This PR Implements the floating point rounding instructions for SIMD values in the RISC-V backend. I'm not too familiar with the intricacies of this algorithm, I've mostly just copied what LLVM emits.

This PR also re-introduces CSR Instructions (deleted in #6267). CSR's are Control and Status Registers, which are used to hold architectural state such as Floating point round modes and Vector type state, etc..

Despite being part of the Zicsr extension, this extension is part of the minimum set of extensions that we need to function (i.e. it is required for floating point to work).

view this post on Zulip Wasmtime GitHub notifications bot (Aug 28 2023 at 14:06):

afonso360 requested cfallin for a review on PR #6920.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 28 2023 at 14:06):

afonso360 requested wasmtime-compiler-reviewers for a review on PR #6920.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 28 2023 at 14:06):

afonso360 requested wasmtime-default-reviewers for a review on PR #6920.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 30 2023 at 14:41):

alexcrichton submitted PR review:

Nice, thanks!

view this post on Zulip Wasmtime GitHub notifications bot (Aug 30 2023 at 18:50):

afonso360 updated PR #6920.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 30 2023 at 18:51):

afonso360 has enabled auto merge for PR #6920.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 30 2023 at 20:20):

afonso360 merged PR #6920.

Last updated: Nov 22 2024 at 16:03 UTC