saulecabrera requested cfallin for a review on PR #6860.
saulecabrera opened PR #6860 from saulecabrera:winch-float-consts
to bytecodealliance:main
:
This change introduces the necessary building blocks to support floats in Winch as well as support for both
f32.const
andf64.const
instructions.To achieve support for floats, this change adds several key enhancements to the compiler:
Constant pool: A constant pool is implemented, at the Assembler level, using the machinery exposed by Cranelift's
VCode
andMachBuffer
. Float immediates are stored using their bit representation in the value stack, and whenever they are used at the MacroAssembler level they are added to the constant pool, from that point on, they are referenced through aConstant
addressing mode, which gets translated to a RIP-relative addressing mode during emission.More precise value tagging: aside from immediates, from which the type can be easily inferred, all the other value stack entries (
Memory
,Reg
, andLocal
) are modified to explicitly contain a WebAssembly type. This allows for better instruction selection.<!--
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saulecabrera requested elliottt for a review on PR #6860.
saulecabrera requested wasmtime-fuzz-reviewers for a review on PR #6860.
saulecabrera requested wasmtime-compiler-reviewers for a review on PR #6860.
saulecabrera requested wasmtime-core-reviewers for a review on PR #6860.
saulecabrera requested alexcrichton for a review on PR #6860.
saulecabrera updated PR #6860.
saulecabrera updated PR #6860.
cfallin submitted PR review:
Generally very clean -- thanks! Some thoughts below.
cfallin submitted PR review:
Generally very clean -- thanks! Some thoughts below.
cfallin created PR review comment:
rather than duplicate code-paths for
gpr
andfpr
variants, would it make sense to have an array indexed by class? Either regalloc2'sRegClass
could be used or a custom type here, doesn't matter too much...
cfallin created PR review comment:
There's some subtlety here in that only the lower half of the
v8
..v15
registers are callee-saved. In Cranelift we overapproximate on both sides (when saving, save the whole register; when generating a callsite, assume whole register is clobbered), and then have an optimization where if our own function's ABI and the callee's ABI are the same then at callsites we ignore these for clobbers. I haven't thought through all the implications with Winch's regalloc model but I just wanted to make sure we've considered this here?
cfallin created PR review comment:
I'm not sure exactly (I haven't paged in enough details of the constant pool) but thought I should call this
XXX
comment out -- can we resolve it either way (do the refactor or remove the comment and note why we're doing this)?
cfallin created PR review comment:
now that this exists, can we rewrite
register_constants
to use it?
saulecabrera updated PR #6860.
saulecabrera updated PR #6860.
saulecabrera updated PR #6860.
saulecabrera updated PR #6860.
saulecabrera submitted PR review.
saulecabrera created PR review comment:
Good call, fixed!
saulecabrera submitted PR review.
saulecabrera created PR review comment:
I've added class based indexing to
RegSet
, it indeed removed quite some duplication. I've opted to keepCodeGenContext::any_gpr
and rewrote it in terms ofCodeGenContext::reg_for_class
saulecabrera submitted PR review.
saulecabrera created PR review comment:
Yeah, this comment is old and not applicable. I've removed it.
saulecabrera submitted PR review.
saulecabrera created PR review comment:
Agreed, as discussed offline, I've added size information to the callee-saved registers.
saulecabrera requested cfallin for a review on PR #6860.
cfallin submitted PR review:
Looks great overall, thanks!
Just one question left for me re: stack alignment, below; otherwise good to merge.
cfallin submitted PR review:
Looks great overall, thanks!
Just one question left for me re: stack alignment, below; otherwise good to merge.
cfallin created PR review comment:
I'm wondering now, with type-based spills, if this has the potential to misalign the stack given that
F32
s take 4 bytes. Could you add a comment here about alignment noting how this works?
saulecabrera updated PR #6860.
saulecabrera submitted PR review.
saulecabrera created PR review comment:
Fixed!
saulecabrera has enabled auto merge for PR #6860.
saulecabrera merged PR #6860.
Last updated: Nov 22 2024 at 16:03 UTC