Wasmtime GitHub notifications bot (May 24 2023 at 20:34): Wasmtime GitHub notifications bot (May 24 2023 at 20:34):alexcrichton opened PR #6450 from alexcrichton:x64-swap-evex-operands to bytecodealliance:main:
This commit updates the
src1/src2/... operand orderings to match those of other XMM/VEX instructions. This should also match Intel's own documentation for numbered registers in instruction encodings.<!--
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Wasmtime GitHub notifications bot (May 24 2023 at 20:34):alexcrichton requested abrown for a review on PR #6450.
Wasmtime GitHub notifications bot (May 24 2023 at 20:34):alexcrichton requested wasmtime-compiler-reviewers for a review on PR #6450.
Wasmtime GitHub notifications bot (May 24 2023 at 20:35):alexcrichton created PR review comment:
I've verified locally with Intel's emulator that this change still works, so the swapping of
a bin the above lowering rules should be correct and this is a result of slightly different printing now.
Wasmtime GitHub notifications bot (May 24 2023 at 20:59):alexcrichton updated PR #6450.
Wasmtime GitHub notifications bot (May 25 2023 at 15:53):alexcrichton updated PR #6450.
Wasmtime GitHub notifications bot (May 25 2023 at 17:39):abrown submitted PR review:
:+1:
Wasmtime GitHub notifications bot (May 25 2023 at 18:20):alexcrichton merged PR #6450.
Last updated: Nov 22 2024 at 16:03 UTC