Stream: git-wasmtime

Topic: wasmtime / PR #6268 riscv64: Implement a few SIMD arithme...

Wasmtime GitHub notifications bot (Apr 23 2023 at 11:33):

afonso360 opened PR #6268 from afonso360:riscv-vec-arithmetic to bytecodealliance:main:

:wave: Hey,

This PR Implements a few more arithmetic ops, I didn't want to implement too many since I want to get the wasmtime testsuite working to get better test coverage.

Similarly to #6266, I've also switched the scalar rules to match only scalars, since most of them used fits_in_64 which also matches vectors.

I also had accidentally switched the order of the registers in VecAluRRR, which I only noticed when implementing isub.

Implemented ops are:

• isub
• imul
• smulhi
• umulhi
• band
• bor
• bxor

This PR is based on #6266, I'll rebase when that lands.

Wasmtime GitHub notifications bot (Apr 23 2023 at 11:33):

afonso360 requested jameysharp for a review on PR #6268.

Wasmtime GitHub notifications bot (Apr 23 2023 at 11:33):

afonso360 requested wasmtime-compiler-reviewers for a review on PR #6268.

Wasmtime GitHub notifications bot (Apr 23 2023 at 11:47):

afonso360 updated PR #6268.

Wasmtime GitHub notifications bot (Apr 24 2023 at 14:19):

alexcrichton submitted PR review.

Wasmtime GitHub notifications bot (Apr 24 2023 at 14:19):

alexcrichton submitted PR review.

Wasmtime GitHub notifications bot (Apr 24 2023 at 14:19):

alexcrichton created PR review comment:

This seems like it may be likely be called relatively frequently, so could this perhaps be calculated when the IsleContext is created and reused from that?

Wasmtime GitHub notifications bot (Apr 24 2023 at 14:19):

alexcrichton created PR review comment:

One thing that may be worth adding here is presets perhaps? For example on x64 sse42 is a preset which automatically sets has_sse41 and has_sse42, so if all of these imply the others then zvl65536b could perhaps be a preset that implies all the others?

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:31):

afonso360 updated PR #6268.

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:43):

alexcrichton submitted PR review.

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:43):

alexcrichton submitted PR review.

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:43):

alexcrichton created PR review comment:

Mind copying over the target x86_64 has_sse41=false line as well from the original test? (maybe lost through a rebase by accident)

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:43):

alexcrichton created PR review comment:

If these all follow the same pattern, one thing I found helpful for AVX was do do something like:

let mut s = format!("{self:?}");
s.make_ascii_lowercase();
s.push_str(".vv");
f.write_str(&s)

which can cut down on codegen times and additionally make this a bit easier to maintain. If the instructions have all sorts of different names though this may not work out well

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:43):

alexcrichton created PR review comment:

This also makes me idly think that perhaps there should be a ; skip: riscv directive for filetests or similar, but not something to be added in this PR of course.

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:46):

afonso360 created PR review comment:

We also have another variant for all of these, which is v*.vx. however, it should still be fairly easy to fit into that scheme when we do need it.

Wasmtime GitHub notifications bot (Apr 25 2023 at 15:50):

afonso360 edited PR review comment.

Wasmtime GitHub notifications bot (Apr 25 2023 at 16:02):

afonso360 updated PR #6268.

Wasmtime GitHub notifications bot (Apr 25 2023 at 16:29):

afonso360 has enabled auto merge for PR #6268.

Wasmtime GitHub notifications bot (Apr 25 2023 at 17:16):

afonso360 merged PR #6268.

Last updated: Nov 22 2024 at 17:03 UTC