alexcrichton opened PR #6224 from alexcrichton:x64-round-sse41
to bytecodealliance:main
:
This commit adds lowerings that work with SSE2 for CLIF
ceil
,trunc
,floor
, andnearest
instructions over vectors. To get these workinginsertlane
for float vectors was also implemented for non-SSE4.1 instructions as well.Note that the goal of these lowerings is not speed but rather "it works", so the decompose-to-call-libcalls logic for vector is probably horrendously slow but should at least be correct.
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alexcrichton requested abrown for a review on PR #6224.
alexcrichton has marked PR #6224 as ready for review.
alexcrichton requested wasmtime-compiler-reviewers for a review on PR #6224.
alexcrichton updated PR #6224.
alexcrichton closed without merge PR #6224.
alexcrichton reopened PR #6224.
abrown submitted PR review.
abrown submitted PR review.
abrown created PR review comment:
;; Helper for creating `movsd`/`movss` instructions which create a new vector
abrown created PR review comment:
I know we're going the other direction here but I started thinking, "what about the AVX versions of these?" Looking at
inst.isle
, they are emitted byx64_round*
, so all is well.
alexcrichton updated PR #6224.
alexcrichton has enabled auto merge for PR #6224.
alexcrichton submitted PR review.
alexcrichton created PR review comment:
Yeah so far I feel like the current pattern of having a low-level instruction constructor which has an avx and a non-avx rule works out pretty well. It is relatively verbose and may be ripe for some future refactoring (e.g. auto-encoding as AVX if the context's feature flags are set) but for now it's nice to not have to worry about AVX at all really as part of
lower.isle
alexcrichton merged PR #6224.
Last updated: Dec 23 2024 at 12:05 UTC