Stream: git-wasmtime

Topic: wasmtime / PR #5440 Assert that we only use virtual regis...


view this post on Zulip Wasmtime GitHub notifications bot (Dec 14 2022 at 21:09):

elliottt opened PR #5440 from trevor/assert-virtual-regs-move to main:

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view this post on Zulip Wasmtime GitHub notifications bot (Dec 14 2022 at 21:19):

cfallin submitted PR review.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 19:21):

elliottt updated PR #5440 from trevor/assert-virtual-regs-move to main.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 19:50):

elliottt updated PR #5440 from trevor/assert-virtual-regs-move to main.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 20:15):

elliottt requested cfallin for a review on PR #5440.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 20:17):

elliottt updated PR #5440 from trevor/assert-virtual-regs-move to main.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 20:18):

elliottt updated PR #5440 from trevor/assert-virtual-regs-move to main.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 20:19):

elliottt has marked PR #5440 as ready for review.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 22:29):

elliottt edited PR #5440 from trevor/assert-virtual-regs-move to main:

Assert that we never see real registers as arguments to move instructions in VCodeBuilder::collect_operands.

Also fix a bug in the riscv64 backend that was discovered by these assertions: the lowerings of get_stack_pointer and get_frame_pointer were using physical registers 8 and 2 directly. The solution was similar to other backends: add a move instruction specifically for moving out of physical registers, whose source operand is opaque to regalloc2.
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view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:04):

cfallin submitted PR review.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:04):

cfallin submitted PR review.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:04):

cfallin created PR review comment:

Can we add a note here that the PReg must be a non-allocatable register?

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:04):

cfallin created PR review comment:

This generic constructor seems a little dangerous because it allows construction of PReg values for allocatable registers, which should not be usable; these will ideally be caught by an assertion (e.g. when handling moves) but it would be better to avoid constructing them in the first place. Could we expose specific constructors for the registers we want (e.g., fp_reg, sp_reg) here instead?

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:04):

cfallin created PR review comment:

Inadvertent insertion/repetition?

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:04):

cfallin created PR review comment:

Is fmv.d the right mnemonic here? That's a floating-point move, no?

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:09):

elliottt created PR review comment:

Yep, thanks!

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:09):

elliottt submitted PR review.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:13):

elliottt submitted PR review.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:13):

elliottt created PR review comment:

Good catch, I misread the F64 in the above case for Mov.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 20 2022 at 23:19):

elliottt updated PR #5440 from trevor/assert-virtual-regs-move to main.

view this post on Zulip Wasmtime GitHub notifications bot (Dec 21 2022 at 02:22):

elliottt merged PR #5440.


Last updated: Oct 23 2024 at 20:03 UTC