abrown opened PR #5225 from shmem-in-wiggle-read-write
to main
:
This change is the first in a series of changes to support shared memory in Wiggle. Since Wiggle was written under the assumption of single-threaded guest-side access, this change introduces a
shared
field to guest memories in order to flag when this assumption will not be the case. This change always setsshared
tofalse
; once a few more pieces are in place,shared
will be set dynamically when a shared memory is detected, e.g., in a change like #5054.Using the
shared
field, we can now decide to load Wiggle values differently under the new assumptions. This change makes the guestT::read
andT::write
calls intoRelaxed
atomic loads and stores in order to maintain WebAssembly's expected memory consistency guarantees. We choose Rust'sRelaxed
here to match theUnordered
memory consistency described in the [memory model] section of the ECMA spec.[memory model]: https://tc39.es/ecma262/multipage/memory-model.html#sec-memory-model
Since 128-bit scalar types do not have
Atomic*
equivalents, we remove theirT::read
andT::write
implementations here. They are unused by any WASI implementations in the project.<!--
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alexcrichton submitted PR review.
alexcrichton submitted PR review.
alexcrichton created PR review comment:
Similar to above, a conversion to little endian wil lneed to happen here
alexcrichton created PR review comment:
I think that this'll need the same
*_le_*
treatment as below, although I realize that'll get funky with the macro here.For converting between
f32
andi32
couldf32::from_bits
andto_bits
be used instead oftransmute
as well?
abrown updated PR #5225 from shmem-in-wiggle-read-write
to main
.
abrown has marked PR #5225 as ready for review.
abrown requested alexcrichton for a review on PR #5225.
alexcrichton submitted PR review.
alexcrichton created PR review comment:
Could this use
host_ptr.cast::<$ty_atomic>()
to avoid theas
?
alexcrichton submitted PR review.
abrown updated PR #5225 from shmem-in-wiggle-read-write
to main
.
abrown merged PR #5225.
Last updated: Dec 23 2024 at 12:05 UTC