Wasmtime GitHub notifications bot (Oct 25 2022 at 17:24): Wasmtime GitHub notifications bot (Oct 25 2022 at 17:24):uweigand opened PR #5121 from s390x-regalloc-check-lane to main:
For VecInsertLane[Undef] and VecExtractLane, if lane_reg is zero_reg(), the instruction does not actually use any register value.
Fixes https://github.com/bytecodealliance/wasmtime/issues/5090
CC @cfallin
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Wasmtime GitHub notifications bot (Oct 25 2022 at 17:36):cfallin submitted PR review.
Wasmtime GitHub notifications bot (Oct 25 2022 at 17:36):cfallin has enabled auto merge for PR #5121.
Wasmtime GitHub notifications bot (Oct 25 2022 at 18:04):cfallin merged PR #5121.
Last updated: Nov 22 2024 at 16:03 UTC