yuyang-ok opened PR #5017 from tls_and_abi
to main
:
This is try to fix https://github.com/bytecodealliance/wasmtime/issues/4994 and https://github.com/bytecodealliance/wasmtime/issues/5008.
But still working.
bjorn3 created PR review comment:
This should take the clobber set from the C call conv (and remove a0)
bjorn3 created PR review comment:
Should this also be a fixed use?
bjorn3 submitted PR review.
bjorn3 submitted PR review.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok submitted PR review.
yuyang-ok created PR review comment:
@bjorn3 , I forget this.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok submitted PR review.
yuyang-ok created PR review comment:
This should do at
riscv64_get_operands
.
yuyang-ok has marked PR #5017 as ready for review.
yuyang-ok requested bjorn3 for a review on PR #5017.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
afonso360 submitted PR review.
afonso360 created PR review comment:
It would be nice if we could add some compile tests for this
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok submitted PR review.
yuyang-ok created PR review comment:
Yes,I have add one test just like other platform, But that one test doesn't mean a lot to me.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok submitted PR review.
yuyang-ok created PR review comment:
I already have the float abi and tls tested.
bjorn3 submitted PR review.
bjorn3 created PR review comment:
The relocations here don't seem to be correct. You first need an
auipc
withR_RISCV_TLS_GD_HI20
and then anaddi
withR_RISCV_PCREL_LO12_I
. You only have the first one.
bjorn3 created PR review comment:
nit:
// We are already done with register alloc.
bjorn3 submitted PR review.
bjorn3 created PR review comment:
Could you also add a use for
a0
?
bjorn3 submitted PR review.
bjorn3 created PR review comment:
Support for this needs to be implemented in cranelift_object. Should be pretty similar to https://github.com/bytecodealliance/wasmtime/pull/4995/files#diff-b825ad4c01be6ae3d42dd6ace012f2815e5e52458abc4f436526a5c4aaa769adR711
bjorn3 submitted PR review.
cfallin created PR review comment:
@bjorn3 to clarify, what would the use be for? The instruction only has one register arg (
rd
), which is output-only; does something else flow in?
cfallin submitted PR review.
bjorn3 submitted PR review.
bjorn3 created PR review comment:
Right, the call contained within it uses
a0
, but that one is defined earlier in this macro instruction.
cfallin submitted PR review.
cfallin created PR review comment:
Yes, and given that,
a0
is not a use of the pseudoinstruction: it is not live-in, and the register allocator does not need to track a liverange for an input that ends up ina0
. Purely internal operations can read and writea0
as many times as they like, since the def constrained toa0
allows the instruction to have an overall effect of "overwritesa0
with output value resulting".So, @yuyang-ok: this code is correct as-is, no worries!
yuyang-ok created PR review comment:
ok.
yuyang-ok submitted PR review.
yuyang-ok submitted PR review.
yuyang-ok created PR review comment:
sorry.
yuyang-ok created PR review comment:
Yes ,a0 is aslo used.
yuyang-ok submitted PR review.
yuyang-ok edited PR review comment.
yuyang-ok created PR review comment:
@bjorn3 Do you mean the name
Reloc::RiscvCall
should beReloc::R_RISCV_CALL
????
yuyang-ok submitted PR review.
yuyang-ok deleted PR review comment.
yuyang-ok submitted PR review.
yuyang-ok created PR review comment:
@cfallin Yes, no need use,
aarch64
did the same.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
bjorn3 submitted PR review.
bjorn3 created PR review comment:
This is what I meant:
diff --git a/cranelift/object/src/backend.rs b/cranelift/object/src/backend.rs index f40a75822..c06c2e3e4 100644 --- a/cranelift/object/src/backend.rs +++ b/cranelift/object/src/backend.rs @@ -720,6 +720,32 @@ impl ObjectModule { 0, ) } + Reloc::RiscvTlsGdHi20 => { + assert_eq!( + self.object.format(), + object::BinaryFormat::Elf, + "RiscvTlsGdHi20 is not supported for this file format" + ); + ( + RelocationKind::Elf(object::elf::R_RISCV_TLS_GD_HI20), + RelocationEncoding::Generic, + 0, + ) + + } + Reloc::RiscvPCRelLo12I => { + assert_eq!( + self.object.format(), + object::BinaryFormat::Elf, + "RiscvPCRelLo12I is not supported for this file format" + ); + ( + RelocationKind::Elf(object::elf::R_RISCV_PCREL_LO12_I), + RelocationEncoding::Generic, + 0, + ) + + } // FIXME reloc => unimplemented!("{:?}", reloc), };
bjorn3 submitted PR review.
bjorn3 created PR review comment:
So I just tried this and the linker gave an error. When I tried comparing it with what LLVM produces I found that this relocation needs to have a label pointing to the previous instruction as target: https://godbolt.org/z/8P31Gcc7Y @cfallin how should an api for allowing backends to produce this kind of labels look like?
yuyang-ok deleted PR review comment.
yuyang-ok created PR review comment:
@bjorn3 In that case I think one reloc maybe be more reasonable like
ElfTlsGD
,ElfTlsGD
means
.LBB0_1:
auipc a0, %tls_gd_pcrel_hi(example::FOO)
addi a0, a0, %pcrel_lo(.LBB0_1)
the whole bunch of things.
`ElfTlsGD+0` means the label and tls_gd_pcrel_hi, `ElfTlsGD + 4` means the pcrel_lo.
yuyang-ok submitted PR review.
yuyang-ok submitted PR review.
yuyang-ok created PR review comment:
ok.
bjorn3 created PR review comment:
It doesn't seem to work that way it seems. For R_RISCV_PCREL_LO12_{I,S} the target is always a label pointing to a place with a R_RISCV_PCREL_HI20, R_RISCV_GOT_HI20, R_RISCV_TLS_GD_HI20 or R_RISCV_TLS_GOT_HI20. The actual symbol for which the R_RISCV_PCREL_LO12_{I,S} works on is taken from this relocation, rather than from the R_RISCV_PCREL_LO12_{I,S} itself. In other words it uses
example::FOO
as symbol rather than.LBB0_1
.
bjorn3 submitted PR review.
cfallin created PR review comment:
@cfallin how should an api for allowing backends to produce this kind of labels look like?
In this case the
MachInst
should generate both instructions I think (auipc
andaddi
); that way the label use is internal to theMachInst
. Anything more complex than that needs a lot of additional plumbing that we don't have...
cfallin submitted PR review.
bjorn3 submitted PR review.
bjorn3 created PR review comment:
Yeah, the label needs to be exported as entry in the ELF symbol table.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
yuyang-ok updated PR #5017 from tls_and_abi
to main
.
alexcrichton closed without merge PR #5017.
Last updated: Nov 22 2024 at 16:03 UTC