dheaton-arm opened PR #4638 from isle-vecalumodop
to main
:
Separates the following opcodes for AArch64 into a separate
VecALUModOp
enum,
which is emitted via theVecRRRMod
instruction. This separates vector ALU
instructions which modify a register from instructions which write to a new register:
Bsl
Fmla
Addresses a discussion in #4608.
Copyright (c) 2022 Arm Limited
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cfallin submitted PR review.
cfallin merged PR #4638.
Last updated: Nov 22 2024 at 16:03 UTC