elliottt opened PR #4599 from trevor/x64-isle-br-i128
to main
:
- Migrate the implementation of brz and brnz for I128
- Remove unused 8-bit ALU instructions
- Finish migrating branch instructions for floats
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elliottt updated PR #4599 from trevor/x64-isle-br-i128
to main
.
elliottt edited PR #4599 from trevor/x64-isle-br-i128
to main
:
I changed the lowering of comparisons for
I128
to always end withtest
instead ofand
oror
depending on whether the context was abrz
orbrnz
instruction. An effect of this change was that the 8-bit variants of theAnd
andOr
alu opcodes were no longer needed. The change that this introduces is visible in thei128.clif
test output update.I've also finished the migration of instructions that require floating point comparisons, and removed all the unused code that stemmed from the rust implementation of
emit_cmp
. This change required adding new constructors to bothSideEffectNoResults
andConsumesFlags
, as theAndCondition
andOrCondition
constructors ofFcmpCompResult
both lower to two jump instructions. This could be re-implemented as two new pseudo-instructions,JmpCondAnd
andJmpCondOr
, if it seems like this isn't the right approach.<!--
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elliottt updated PR #4599 from trevor/x64-isle-br-i128
to main
.
elliottt edited PR #4599 from trevor/x64-isle-br-i128
to main
:
I changed the lowering of comparisons for
I128
to always end withtest
instead ofand
oror
depending on whether the context was abrz
orbrnz
instruction. An effect of this change was that the 8-bit variants of theAnd
andOr
alu opcodes were no longer needed. The change that this introduces is visible in thei128.clif
test output update.I've also finished the migration of instructions that require floating point comparisons, and removed all the unused code that stemmed from the rust implementation of
emit_fcmp
. This change required adding new constructors to bothSideEffectNoResults
andConsumesFlags
, as theAndCondition
andOrCondition
constructors ofFcmpCompResult
both lower to two jump instructions. This could be re-implemented as two new pseudo-instructions,JmpCondAnd
andJmpCondOr
, if it seems like this isn't the right approach.<!--
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the PR.
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here.[ ] A short description of what this does, why it is needed; if the
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first.[ ] This PR contains test cases, if meaningful.
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elliottt has marked PR #4599 as ready for review.
elliottt requested cfallin for a review on PR #4599.
elliottt updated PR #4599 from trevor/x64-isle-br-i128
to main
.
elliottt updated PR #4599 from trevor/x64-isle-br-i128
to main
.
elliottt updated PR #4599 from trevor/x64-isle-br-i128
to main
.
elliottt updated PR #4599 from trevor/x64-isle-br-i128
to main
.
elliottt edited PR #4599 from trevor/x64-isle-br-i128
to main
:
I changed the lowering of comparisons for
I128
to always end withtest
instead ofand
oror
depending on whether the context was abrz
orbrnz
instruction. An effect of this change was that the 8-bit variants of theAnd
andOr
alu opcodes were no longer needed. The change that this introduces is visible in thei128.clif
test output update.I've also finished the migration of instructions that require floating point comparisons, and removed all the unused code that stemmed from the rust implementation of
emit_fcmp
. This change required adding new constructors to bothSideEffectNoResults
andConsumesFlags
, as theAndCondition
andOrCondition
constructors ofFcmpCompResult
both lower to two jump instructions. This could be re-implemented as two new pseudo-instructions,JmpCondAnd
andJmpCondOr
, if it seems like this isn't the right approach.The test cases added in
filetests/isa/x64/branches.clif
were generated on the main branch, which helped with debugging thebrz (fcmp ...)
lowering.<!--
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elliottt has marked PR #4599 as ready for review.
cfallin created PR review comment:
Can this go away completely now (i.e. constant-prop the
false
outward to wherever it's called, if anywhere)?
cfallin submitted PR review.
cfallin submitted PR review.
elliottt submitted PR review.
elliottt created PR review comment:
Definitely! I was a little unsure if removing
Add8
andOr8
was desirable, so I didn't push the refactoring as far as I could have :)
cfallin created PR review comment:
We likely won't need them for anything else I think -- the actual 8-bit ops use wider opcodes because it's more efficient microarchitecturally (no partial-register stalls) and the upper bits are don't-cares; at least
or8
was only needed here because we used SETcc which only sets the lower 8. We can always add them back if we find they're needed!
cfallin submitted PR review.
elliottt updated PR #4599 from trevor/x64-isle-br-i128
to main
.
elliottt merged PR #4599.
Last updated: Nov 22 2024 at 16:03 UTC