abrown opened PR #4389 from isle-atomic-rmw
to main
:
This change ports
atomic_rmw
to ISLE for the x64 backend. It does not
change the lowering in any way, though it seems possible that the fixed
regs need not be as fixed and that there are opportunities for single
instruction lowerings. It does renameinst_common::AtomicRmwOp
to
MachAtomicRmwOp
to disambiguate with the IR enum with the same name.<!--
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cfallin submitted PR review.
cfallin submitted PR review.
cfallin created PR review comment:
Let's keep some variant of this FIXME around: it would still be ideal to not have hardcoded registers in the sequence, but rather allocate as many temps as needed (as operands) and use them here.
cfallin created PR review comment:
No indent here
cfallin created PR review comment:
Can we assert something about
flags
? (We could pass it intox64_atomic_rmw_seq
and match only the flags that we expect, or something like that...)
cfallin created PR review comment:
These two should be "late uses", or otherwise the below two defs should be "early defs", semantically. It won't matter yet with the fixed reg constraints (neither of the defs could possibly overlap either of the uses) but it will matter when we eventually remove the need for the fixed regs, and I'd rather note it now while we're thinking about it!
I don't think there is a
reg_fixed_late_use
on theOperandCollector
but we should be able to add one, analogously to the other helpers there.
cfallin created PR review comment:
Likewise here, let's have some sort of TODO noting that ideally we wouldn't have register constraints.
abrown submitted PR review.
abrown created PR review comment:
Ok, I might actually add another commit to this PR to avoid the hard coded registers... Just wanted to make sure this was on the right track. (Or I could open another PR, I guess).
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown submitted PR review.
abrown created PR review comment:
I think we probably want a
fixed_reg_use_at_end
helper inregalloc2
. See what I did inOperandCollector
in the interim.
abrown created PR review comment:
Not sure what we should assert here.
abrown submitted PR review.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown created PR review comment:
Ok, take a look at 3799054, which calculates the amode at this point instead of in
emit.rs
. I believe this is the more conventional way to do things in ISLE now, but unfortunately I see failures relatedreg.is_real()
so themem.finalize...
part must not be right.
abrown submitted PR review.
cfallin created PR review comment:
Ah, I think this is missing the corresponding use of the amode in the
get_operands
method; once that's added (in the same order as theallocs
invocations) it should probably work?
cfallin submitted PR review.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown submitted PR review.
abrown created PR review comment:
Hm, that fixes one problem but now I see
wasm trap: out of bounds memory access
fromthreads.wast
.mem.get_operands()
ends up doing acollector.reg_use()
instead ofcollector.reg_late_use()
like we were doing previously--seems like this could be the problem?
cfallin submitted PR review.
cfallin created PR review comment:
Ah yes! I think we'll need a variant of
SyntheticAmode::get_operands()
(and the functions it calls,Amode::get_operands()
at least) that is something likeget_operands_late()
and internally doesreg_late_use()
instead.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown created PR review comment:
Ok, that seems to work.
abrown submitted PR review.
cfallin submitted PR review.
abrown has marked PR #4389 as ready for review.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown updated PR #4389 from isle-atomic-rmw
to main
.
abrown has enabled auto merge for PR #4389.
abrown merged PR #4389.
Last updated: Dec 23 2024 at 13:07 UTC