Stream: git-wasmtime

Topic: wasmtime / PR #2771 Implements convert low signed integer...


view this post on Zulip Wasmtime GitHub notifications bot (Mar 25 2021 at 19:39):

jlb6740 edited PR #2771 from x64_simd_convert_i32_to_f64 to main.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 25 2021 at 19:42):

jlb6740 requested abrown for a review on PR #2771.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 02:37):

jlb6740 requested fitzgen, cfallin and abrown for a review on PR #2771.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 02:37):

jlb6740 requested fitzgen, cfallin and abrown for a review on PR #2771.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 16:31):

abrown submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 16:31):

abrown submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 16:31):

abrown created PR Review Comment:

I think we should add something about rounding like in fcvt_from_sint and something describing what the low part of the name means.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 16:31):

abrown created PR Review Comment:

I mean, it's not like the SIMD documentation is much more verbose... perhaps that should get fixed too. I think we need to say something about how the two lowest i32s in the vector (lanes 0 and 1) are the ones converted to the f64. From the Intel reference:

CVTDQ2PD (128-bit Legacy SSE version)
DEST[63:0] := Convert_Integer_To_Double_Precision_Floating_Point(SRC[31:0])
DEST[127:64] := Convert_Integer_To_Double_Precision_Floating_Point(SRC[63:32])
DEST[MAXVL-1:128] (unmodified)

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 16:31):

abrown edited PR Review Comment.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 16:47):

cfallin submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 17:49):

jlb6740 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 17:49):

jlb6740 created PR Review Comment:

Yes, this is a good point. In updating the comments I just used language of half. That is because the "fcvt_low_from_sint" can also support AVX-512 where we could convert the "four" lowest i32s. That instruction doesn't exist of course in the spec, but could be a candidate for a future iteration of the spec or relaxed simd.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 17:56):

jlb6740 updated PR #2771 from x64_simd_convert_i32_to_f64 to main.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 26 2021 at 19:13):

jlb6740 merged PR #2771.


Last updated: Dec 23 2024 at 12:05 UTC