Stream: git-wasmtime

Topic: wasmtime / PR #2713 [simd] Implement load*_lane and store...


view this post on Zulip Wasmtime GitHub notifications bot (Mar 08 2021 at 17:55):

abrown opened PR #2713 from memory_lane_access to main:

The Wasm SIMD specification has added new instructions that allow inserting to the lane of a vector from a memory location, and conversely, extracting from a lane of a vector to a memory location. The simplest implementation lowers these instructions, load[8|16|32|64]_lane and store[8|16|32|64]_lane, to a sequence of either load + insertlane or extractlane + store (in CLIF). With the new backend's pattern matching, we expect these CLIF sequences to compile as a single machine instruction (at least in x64).

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view this post on Zulip Wasmtime GitHub notifications bot (Mar 08 2021 at 18:47):

abrown has marked PR #2713 as ready for review.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 08 2021 at 18:47):

abrown requested cfallin for a review on PR #2713.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 08 2021 at 19:25):

cfallin submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Mar 08 2021 at 19:25):

cfallin merged PR #2713.


Last updated: Dec 23 2024 at 12:05 UTC