abrown opened PR #2713 from memory_lane_access
to main
:
The Wasm SIMD specification has added new instructions that allow inserting to the lane of a vector from a memory location, and conversely, extracting from a lane of a vector to a memory location. The simplest implementation lowers these instructions,
load[8|16|32|64]_lane
andstore[8|16|32|64]_lane
, to a sequence of eitherload + insertlane
orextractlane + store
(in CLIF). With the new backend's pattern matching, we expect these CLIF sequences to compile as a single machine instruction (at least in x64).<!--
Please ensure that the following steps are all taken care of before submitting
the PR.
[ ] This has been discussed in issue #..., or if not, please tell us why
here.[ ] A short description of what this does, why it is needed; if the
description becomes long, the matter should probably be discussed in an issue
first.[ ] This PR contains test cases, if meaningful.
- [ ] A reviewer from the core maintainer team has been assigned for this PR.
If you don't know who could review this, please indicate so. The list of
suggested reviewers on the right can help you.Please ensure all communication adheres to the code of conduct.
-->
abrown has marked PR #2713 as ready for review.
abrown requested cfallin for a review on PR #2713.
cfallin submitted PR Review.
cfallin merged PR #2713.
Last updated: Nov 22 2024 at 16:03 UTC