cfallin requested fitzgen and abrown for a review on PR #2685.
cfallin opened PR #2685 from fix-multi-trap-metadata
to main
:
If an instruction has more than one trap record associated with it (for
example: a divide instruction that has participated in load-op fusion,
so we have both a heap-out-of-bounds trap record due to its load and a
divide-by-zero trap record due to its divide op), the current MachBuffer
code would emit only one of the trap records to the sink.Separately, divide instructions probably shouldn't merge loads, because
the two separate possible traps at one location might be confusing for
some embedders (certainly in Lucet). Divide seems to be the only case in
our current codegen where such merging might occur. This PR changes the
lowering to always force the divisor into a register.Finally, while working out why trap records were not appearing, I had
noticed thatisa::x64::emit_std_enc_mem()
was only emitting heap-OOB
trap metadata for loads/stores when it had a srcloc. This PR ensures
that the metadata is emitted even when the srcloc is empty.Note that none of the above presents a security or correctness problem;
trap metadata only affects the status that we return to the embedder
when a Wasm program terminates with a trap.<!--
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cfallin requested fitzgen and abrown for a review on PR #2685.
fitzgen submitted PR Review.
cfallin merged PR #2685.
Last updated: Dec 23 2024 at 12:05 UTC