akirilov-arm opened PR #2278 from load_splat
to main
:
It corresponds to WebAssembly's
load*_splat
operations, which were previously represented as a combination ofLoad
andSplat
instructions. However, there are architectures such as Armv8-A that have a single machine instruction equivalent to the Wasm operations. In order to generate it, it is necessary to merge theLoad
and theSplat
in the backend, which is not possible because the load may have side effects. The new IR instruction works around this limitation.The AArch64 backend leverages the new instruction to improve code generation. I am not really qualified to implement the optimization for x86, so I have added a temporary work-around to avoid any test breakage. It's a bit of a hack, but it should be incorrect only when cross-compiling to x86 on an Arm platform.
Fixes #1175 (but other backends need work too).
cc @abrown @cfallin
abrown submitted PR Review.
cfallin submitted PR Review.
akirilov-arm updated PR #2278 from load_splat
to main
:
It corresponds to WebAssembly's
load*_splat
operations, which were previously represented as a combination ofLoad
andSplat
instructions. However, there are architectures such as Armv8-A that have a single machine instruction equivalent to the Wasm operations. In order to generate it, it is necessary to merge theLoad
and theSplat
in the backend, which is not possible because the load may have side effects. The new IR instruction works around this limitation.The AArch64 backend leverages the new instruction to improve code generation. I am not really qualified to implement the optimization for x86, so I have added a temporary work-around to avoid any test breakage. It's a bit of a hack, but it should be incorrect only when cross-compiling to x86 on an Arm platform.
Fixes #1175 (but other backends need work too).
cc @abrown @cfallin
abrown updated PR #2278 from load_splat
to main
:
It corresponds to WebAssembly's
load*_splat
operations, which were previously represented as a combination ofLoad
andSplat
instructions. However, there are architectures such as Armv8-A that have a single machine instruction equivalent to the Wasm operations. In order to generate it, it is necessary to merge theLoad
and theSplat
in the backend, which is not possible because the load may have side effects. The new IR instruction works around this limitation.The AArch64 backend leverages the new instruction to improve code generation. I am not really qualified to implement the optimization for x86, so I have added a temporary work-around to avoid any test breakage. It's a bit of a hack, but it should be incorrect only when cross-compiling to x86 on an Arm platform.
Fixes #1175 (but other backends need work too).
cc @abrown @cfallin
akirilov-arm updated PR #2278 from load_splat
to main
:
It corresponds to WebAssembly's
load*_splat
operations, which were previously represented as a combination ofLoad
andSplat
instructions. However, there are architectures such as Armv8-A that have a single machine instruction equivalent to the Wasm operations. In order to generate it, it is necessary to merge theLoad
and theSplat
in the backend, which is not possible because the load may have side effects. The new IR instruction works around this limitation.The AArch64 backend leverages the new instruction to improve code generation. I am not really qualified to implement the optimization for x86, so I have added a temporary work-around to avoid any test breakage. It's a bit of a hack, but it should be incorrect only when cross-compiling to x86 on an Arm platform.
Fixes #1175 (but other backends need work too).
cc @abrown @cfallin
akirilov-arm updated PR #2278 from load_splat
to main
:
It corresponds to WebAssembly's
load*_splat
operations, which were previously represented as a combination ofLoad
andSplat
instructions. However, there are architectures such as Armv8-A that have a single machine instruction equivalent to the Wasm operations. In order to generate it, it is necessary to merge theLoad
and theSplat
in the backend, which is not possible because the load may have side effects. The new IR instruction works around this limitation.The AArch64 backend leverages the new instruction to improve code generation. I am not really qualified to implement the optimization for x86, so I have added a temporary work-around to avoid any test breakage. It's a bit of a hack, but it should be incorrect only when cross-compiling to x86 on an Arm platform.
Fixes #1175 (but other backends need work too).
cc @abrown @cfallin
abrown updated PR #2278 from load_splat
to main
:
It corresponds to WebAssembly's
load*_splat
operations, which were previously represented as a combination ofLoad
andSplat
instructions. However, there are architectures such as Armv8-A that have a single machine instruction equivalent to the Wasm operations. In order to generate it, it is necessary to merge theLoad
and theSplat
in the backend, which is not possible because the load may have side effects. The new IR instruction works around this limitation.The AArch64 backend leverages the new instruction to improve code generation. I am not really qualified to implement the optimization for x86, so I have added a temporary work-around to avoid any test breakage. It's a bit of a hack, but it should be incorrect only when cross-compiling to x86 on an Arm platform.
Fixes #1175 (but other backends need work too).
cc @abrown @cfallin
cfallin submitted PR Review.
cfallin merged PR #2278.
Last updated: Dec 23 2024 at 12:05 UTC