jlb6740 opened PR #2234 from add-packed-float-min-max
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jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 has marked PR #2234 as ready for review.
jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 requested bnjbvr for a review on PR #2234.
jlb6740 requested cfallin and bnjbvr for a review on PR #2234.
bnjbvr submitted PR Review.
abrown submitted PR Review.
abrown created PR Review Comment:
:+1:
abrown submitted PR Review.
abrown created PR Review Comment:
Remove?
abrown submitted PR Review.
abrown created PR Review Comment:
Bill Budge showed me this: https://chromium-review.googlesource.com/c/v8/v8/+/2231653/1.
jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
@abrown Excellent, thanks! Even without workloads to truly confirm I think this is a definite future todo.
jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1: Yep, thanks. Good catch.
jlb6740 requested cfallin and bnjbvr for a review on PR #2234.
jlb6740 requested cfallin, abrown and bnjbvr for a review on PR #2234.
abrown submitted PR Review.
abrown submitted PR Review.
abrown created PR Review Comment:
I've been using the following (not that it makes much of a difference logically but for clarity):
if !output_ty.is_vector() {
abrown created PR Review Comment:
// X64 handles propagation of -0's and Nans differently between left and right
abrown created PR Review Comment:
// scalar approach we use jumps to handle cases where NaN and +0 propagation is
abrown created PR Review Comment:
let tmp_xmm1 = ctx.alloc_tmp(RegClass::V128, output_ty);
I don't think this will affect the codegen but it seems more correct: we want this register to contain a vector type no a scalar type.
abrown created PR Review Comment:
:+1: for bringing the other tests in as well; we can uncomment the others as we get to them. I do think we should add
compile
tests forfmin/fmax
like I did insimd-lane-access-compile.clif
; that way we test that the sequence emitted stays correct over time. I don't think we should do it for simpler stuff but for long, tricky sequences like these I feel it would be helpful.
abrown created PR Review Comment:
ctx.emit(Inst::xmm_rm_r(or_op, RegMem::from(dst), tmp_xmm1));
abrown created PR Review Comment:
And the same a few other places below.
abrown created PR Review Comment:
// operands. After doing the min in both directions, this OR will
abrown created PR Review Comment:
// First we perform the Min/Max in both directions. This is because in the
abrown created PR Review Comment:
// X64 handles propagation of -0's and Nans differently between left and right // operands. After doing the max in both directions, this OR will // guarantee capture of 0's and Nan in our tmp register. ctx.emit(Inst::xmm_rm_r(or_op, RegMem::reg(dst.to_reg()), tmp_xmm1));
abrown created PR Review Comment:
ctx.emit(Inst::xmm_rm_r(min_op, RegMem::from(dst), tmp_xmm1));
I added
RegMem::from
to make things less verbose.
abrown created PR Review Comment:
// guarantee capture of -0's and Nan in our tmp register
abrown created PR Review Comment:
I think we should copy in some of the documentation I had in
expand_minmax_vector
to explain why we are shifting this certain number of bits. Without that, it may be unclear to someone looking at this later, especially the part where we always produce-NaN
here and that is allowed by the spec--that is not very obvious.
abrown created PR Review Comment:
nit: I know @bnjbvr would want these to have ending periods.
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1: .. I was just using jmps for shorthand. Saves a lot of characters :-).
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 created PR Review Comment:
:+1:
jlb6740 submitted PR Review.
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1: Thought I'd removed that comment.
jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 updated PR #2234 from add-packed-float-min-max
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jlb6740 submitted PR Review.
jlb6740 created PR Review Comment:
:+1:
jlb6740 merged PR #2234.
Last updated: Nov 22 2024 at 16:03 UTC