Stream: git-wasmtime

Topic: wasmtime / PR #2155 AArch64: Implement SIMD conversions

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:02):

akirilov-arm opened PR #2155 from simd_conversions to main:

This PR completes the AArch64 SIMD implementation, at least with respect to the tests from the Wasm SIMD specification. There are still a couple of unimplemented SIMD code paths in the backend (e.g. Vsplit), but they are currently not exercised by any tests, so I am not sure how important they are (for example, they might be one of the IR operations that the backend is never supposed to see). In any case I think we are able to emit all instructions that are necessary, so implementing the missing bits shouldn't require more than simple changes to lower_insn_to_regs().

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:24):

bjorn3 created PR Review Comment:

Can you use out_ty.is_vector() instead. This would match i128 too, which is not a vector type.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:24):

bjorn3 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:24):

bjorn3 edited PR Review Comment.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:28):

cfallin submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:29):

cfallin submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:29):

cfallin created PR Review Comment:

+1 to this (and perhaps audit the rest of the lowering code as well).

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 16:30):

cfallin submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 17:12):

akirilov-arm updated PR #2155 from simd_conversions to main:

This PR completes the AArch64 SIMD implementation, at least with respect to the tests from the Wasm SIMD specification. There are still a couple of unimplemented SIMD code paths in the backend (e.g. Vsplit), but they are currently not exercised by any tests, so I am not sure how important they are (for example, they might be one of the IR operations that the backend is never supposed to see). In any case I think we are able to emit all instructions that are necessary, so implementing the missing bits shouldn't require more than simple changes to lower_insn_to_regs().

view this post on Zulip Wasmtime GitHub notifications bot (Aug 21 2020 at 18:01):

cfallin merged PR #2155.

Last updated: Dec 23 2024 at 13:07 UTC