cfallin opened PR #2042 from aarch64-fix-regshift-mask
to main
:
We had previously fixed a bug in which constant shift amounts should be
masked to modulo the number of bits in the operand (#1999); however, we
did not fix the analogous case for shifts incorporated into the second
register argument of ALU instructions that support integrated shifts.
This failure to mask resulted in illegal instructions being generated,
e.g. in https://bugzilla.mozilla.org/show_bug.cgi?id=1653502. This PR
fixes the issue by masking the amount, as the shift semantics require.<!--
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cfallin requested bnjbvr and julian-seward1 for a review on PR #2042.
cfallin requested bnjbvr and julian-seward1 for a review on PR #2042.
cfallin updated PR #2042 from aarch64-fix-regshift-mask
to main
:
We had previously fixed a bug in which constant shift amounts should be
masked to modulo the number of bits in the operand (#1999); however, we
did not fix the analogous case for shifts incorporated into the second
register argument of ALU instructions that support integrated shifts.
This failure to mask resulted in illegal instructions being generated,
e.g. in https://bugzilla.mozilla.org/show_bug.cgi?id=1653502. This PR
fixes the issue by masking the amount, as the shift semantics require.<!--
Please ensure that the following steps are all taken care of before submitting
the PR.
[ ] This has been discussed in issue #..., or if not, please tell us why
here.[ ] A short description of what this does, why it is needed; if the
description becomes long, the matter should probably be discussed in an issue
first.[ ] This PR contains test cases, if meaningful.
- [ ] A reviewer from the core maintainer team has been assigned for this PR.
If you don't know who could review this, please indicate so. The list of
suggested reviewers on the right can help you.Please ensure all communication adheres to the code of conduct.
-->
cfallin edited PR #2042 from aarch64-fix-regshift-mask
to main
:
We had previously fixed a bug in which constant shift amounts should be
masked to modulo the number of bits in the operand; however, we
did not fix the analogous case for shifts incorporated into the second
register argument of ALU instructions that support integrated shifts.
This failure to mask resulted in illegal instructions being generated,
e.g. in https://bugzilla.mozilla.org/show_bug.cgi?id=1653502. This PR
fixes the issue by masking the amount, as the shift semantics require.<!--
Please ensure that the following steps are all taken care of before submitting
the PR.
[ ] This has been discussed in issue #..., or if not, please tell us why
here.[ ] A short description of what this does, why it is needed; if the
description becomes long, the matter should probably be discussed in an issue
first.[ ] This PR contains test cases, if meaningful.
- [ ] A reviewer from the core maintainer team has been assigned for this PR.
If you don't know who could review this, please indicate so. The list of
suggested reviewers on the right can help you.Please ensure all communication adheres to the code of conduct.
-->
julian-seward1 submitted PR Review.
cfallin merged PR #2042.
Last updated: Nov 22 2024 at 16:03 UTC