jgouly opened PR #1801 from cmp-rebase
to master
:
Copyright (c) 2020, Arm Limited.
cfallin submitted PR Review.
cfallin submitted PR Review.
cfallin created PR Review Comment:
This is an artifact of the way we assign virtual regs to SSA values -- the result has to have a separate vreg (because it's already been allocated, and may have been used by other instructions by the time we codegen this inst), but the regalloc's move coalescing should elide the move unless it was actually needed.
I'm somewhat confused/concerned by the "regalloc error" though -- do you mean that if you just omit the move, you get something like a value-not-defined error? Or something else?
In any case, we should remove this comment once resolving the above -- feel free to add a comment re: the move coalescing though!
jgouly submitted PR Review.
jgouly created PR Review Comment:
The error I get is
Analysis(EntryLiveinValues)
.It sounds like this is how it is expected to be implemented, so I will just remove the TODO?
cfallin submitted PR Review.
cfallin created PR Review Comment:
Yep, that basically means that a register is live-in at entry when it shouldn't be -- here I would assume it's the result register of the RawBitcast, because it has no defs in the function body but is used elsewhere.
So, just remove the TODO and this is good to go -- thanks!
jgouly updated PR #1801 from cmp-rebase
to master
:
Copyright (c) 2020, Arm Limited.
cfallin merged PR #1801.
Last updated: Dec 23 2024 at 12:05 UTC