cfallin opened PR #1582 (assigned to bnjbvr) from aarch64-fcopysign
to master
:
Previously,
fcopysign
was mysteriously failing to pass the
float_misc
spec test. This was tracked down to bad logical-immediate
masks used to separate the sign and not-sign bits. In particular, the
masks for the and-not operations were wrong. Theinvert()
function on
anImmLogic
immediate, it turns out, assumed every immediate would be
used by a 64-bit instruction;ImmLogic
immediates are subtly different
for 32-bit instructions. This change tracks the instruction size (32 or
64 bits) intended for use with each such immediate, and passes it back
intomaybe_from_u64
when computing the inverted immediate.Addresses one of the failures (
float_misc
) for #1521 (test failures)
and presumably helps #1519 (SpiderMonkey integration).<!--
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cfallin assigned PR #1582 to bnjbvr.
cfallin assigned PR #1582 to bnjbvr.
jgouly submitted PR Review.
jgouly submitted PR Review.
jgouly created PR Review Comment:
Can we just get rid of from_raw() and use maybe_from_u64().unwrap()?
jgouly submitted PR Review.
jgouly created PR Review Comment:
This fixes f32 and f64 _bitwise.
bnjbvr submitted PR Review.
cfallin updated PR #1582 (assigned to bnjbvr) from aarch64-fcopysign
to master
:
Previously,
fcopysign
was mysteriously failing to pass the
float_misc
spec test. This was tracked down to bad logical-immediate
masks used to separate the sign and not-sign bits. In particular, the
masks for the and-not operations were wrong. Theinvert()
function on
anImmLogic
immediate, it turns out, assumed every immediate would be
used by a 64-bit instruction;ImmLogic
immediates are subtly different
for 32-bit instructions. This change tracks the instruction size (32 or
64 bits) intended for use with each such immediate, and passes it back
intomaybe_from_u64
when computing the inverted immediate.Addresses one of the failures (
float_misc
) for #1521 (test failures)
and presumably helps #1519 (SpiderMonkey integration).<!--
Please ensure that the following steps are all taken care of before submitting
the PR.
[ ] This has been discussed in issue #..., or if not, please tell us why
here.[ ] A short description of what this does, why it is needed; if the
description becomes long, the matter should probably be discussed in an issue
first.[ ] This PR contains test cases, if meaningful.
- [ ] A reviewer from the core maintainer team has been assigned for this PR.
If you don't know who could review this, please indicate so. The list of
suggested reviewers on the right can help you.Please ensure all communication adheres to the code of conduct.
-->
cfallin updated PR #1582 (assigned to bnjbvr) from aarch64-fcopysign
to master
:
Previously,
fcopysign
was mysteriously failing to pass the
float_misc
spec test. This was tracked down to bad logical-immediate
masks used to separate the sign and not-sign bits. In particular, the
masks for the and-not operations were wrong. Theinvert()
function on
anImmLogic
immediate, it turns out, assumed every immediate would be
used by a 64-bit instruction;ImmLogic
immediates are subtly different
for 32-bit instructions. This change tracks the instruction size (32 or
64 bits) intended for use with each such immediate, and passes it back
intomaybe_from_u64
when computing the inverted immediate.Addresses one of the failures (
float_misc
) for #1521 (test failures)
and presumably helps #1519 (SpiderMonkey integration).<!--
Please ensure that the following steps are all taken care of before submitting
the PR.
[ ] This has been discussed in issue #..., or if not, please tell us why
here.[ ] A short description of what this does, why it is needed; if the
description becomes long, the matter should probably be discussed in an issue
first.[ ] This PR contains test cases, if meaningful.
- [ ] A reviewer from the core maintainer team has been assigned for this PR.
If you don't know who could review this, please indicate so. The list of
suggested reviewers on the right can help you.Please ensure all communication adheres to the code of conduct.
-->
cfallin merged PR #1582.
Last updated: Dec 23 2024 at 12:05 UTC