ilyas-mallah opened PR #14778 from ilyas-mallah:x64-fcvt-to-small-int to bytecodealliance:main:
Compiling fcvt_to_{u,s}int{,_sat} with an i8 or i16 result panics on x64 in emit.rs. The lowering rules accept those types, but the conversion sequences only emit 32-bit and 64-bit forms. aarch64, riscv64 and s390x already lower them. Wasm never produces these results, so only CLIF reaches the panic.
This converts to i32, then clamps the result or traps with int_ovf when it's out of range. The unsigned forms can use the signed conversion, since anything at 2^31 or above already saturates or traps there.
x86_64 now runs the existing i8 and i16 runtests. Runtests can't expect a trap, so I also ran 122 NaN and out-of-range inputs natively, and every one trapped. The run line I fixed in fcvt-sat-small.clif named the signed function under the unsigned one.
test runignores the name and calls the function above it, so it never failed.Fixes #4897.
ilyas-mallah requested alexcrichton for a review on PR #14778.
ilyas-mallah requested wasmtime-compiler-reviewers for a review on PR #14778.
github-actions[bot] added the label cranelift on PR #14778.
github-actions[bot] added the label cranelift:area:x64 on PR #14778.
:thumbs_up: alexcrichton submitted PR review:
Thanks!
alexcrichton has enabled auto merge for PR #14778.
alexcrichton added PR #14778 x64: Lower fcvt_to_{u,s}int{,_sat} to i8 and i16 to the merge queue.
github-merge-queue[bot] removed PR #14778 x64: Lower fcvt_to_{u,s}int{,_sat} to i8 and i16 from the merge queue.
ilyas-mallah commented on PR #14778:
@alexcrichton The merge queue dropped this because "Release build for x86_64-macos-min" failed in its checkout step (https://github.com/bytecodealliance/wasmtime/actions/runs/38923406906/job/117048886789), which looks like a runner flake. Could you add it back to the queue?
alexcrichton added PR #14778 x64: Lower fcvt_to_{u,s}int{,_sat} to i8 and i16 to the merge queue.
:check: alexcrichton merged PR #14778.
alexcrichton removed PR #14778 x64: Lower fcvt_to_{u,s}int{,_sat} to i8 and i16 from the merge queue.
Last updated: Oct 31 2026 at 23:03 UTC