Stream: git-wasmtime

Topic: wasmtime / PR #14771 cranelift: Implement 128-bit atomic ...

Wasmtime GitHub notifications bot (Oct 15 2026 at 12:24):

Gelbpunkt opened PR #14771 from Gelbpunkt:s390x-128bit-atomic-cas to bytecodealliance:main:

Depends on #14770

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This adds and makes use of the CDSG instruction. Since the 128-bit integers are stored in VRs and CDSG operates on RegPairs, we need to introduce some helpers to move data between VRs and RegPairs by extracting or inserting two lanes of I64s.

I've verified this in qemu-user and on a z15 inside z/VM with the atomic-128 runtest, but we're missing an implementation of atomic_rmw before that can be enabled on s390x.

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I'm not sure where to put these helpers, if there's a better place than lower.isle, which I suspect there may be, please let me know :)

Wasmtime GitHub notifications bot (Oct 15 2026 at 12:37):

Gelbpunkt updated PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 14:48):

github-actions[bot] added the label cranelift on PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 15:42):

Gelbpunkt updated PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 15:42):

Gelbpunkt updated PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 15:42):

Gelbpunkt edited PR #14771:

This adds and makes use of the CDSG instruction. Since the 128-bit integers are stored in VRs and CDSG operates on RegPairs, we need to introduce some helpers to move data between VRs and RegPairs by extracting or inserting two lanes of I64s.

I've verified this in qemu-user and on a z15 inside z/VM with the atomic-128 runtest, but we're missing an implementation of atomic_rmw before that can be enabled on s390x.

---

I'm not sure where to put these helpers, if there's a better place than lower.isle, which I suspect there may be, please let me know :)

Wasmtime GitHub notifications bot (Oct 15 2026 at 15:42):

Gelbpunkt has marked PR #14771 as ready for review.

Wasmtime GitHub notifications bot (Oct 15 2026 at 15:42):

Gelbpunkt requested wasmtime-compiler-s390x-reviewers for a review on PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 15:42):

Gelbpunkt requested alexcrichton for a review on PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 15:42):

Gelbpunkt requested wasmtime-compiler-reviewers for a review on PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 19:14):

alexcrichton requested theotherjimmy for a review on PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 19:42):

:thumbs_up: theotherjimmy submitted PR review:

Looks BE only for now. is LE planned? (same as i64, could be implemented with before and after byte swaps)

Wasmtime GitHub notifications bot (Oct 15 2026 at 19:43):

Gelbpunkt commented on PR #14771:

is LE planned?

I don't have immediate plans for that because our usecase in rustc_codegen_cranelift doesn't require it. Could potentially look into it as a follow-up once atomic_rmw is also done.

Wasmtime GitHub notifications bot (Oct 15 2026 at 20:01):

alexcrichton commented on PR #14771:

@theotherjimmy oh also you're now added to the s390x-reviewers group for this repo so you should have write access to merge PRs and you'll also get auto-tagged for review occasionally. I'll queue up since I'm here but wanted to let you know too

Wasmtime GitHub notifications bot (Oct 15 2026 at 20:01):

alexcrichton added PR #14771 cranelift: Implement 128-bit atomic CAS for s390x to the merge queue.

Wasmtime GitHub notifications bot (Oct 15 2026 at 21:29):

:check: alexcrichton merged PR #14771.

Wasmtime GitHub notifications bot (Oct 15 2026 at 21:29):

alexcrichton removed PR #14771 cranelift: Implement 128-bit atomic CAS for s390x from the merge queue.

Last updated: Oct 31 2026 at 23:03 UTC