Stream: git-wasmtime

Topic: wasmtime / PR #1409 Implement additional i8x16 shift inst...

view this post on Zulip Wasmtime GitHub notifications bot (Mar 25 2020 at 23:29):

abrown opened PR #1409 from additional-i8x16-shift to master:

This is a follow-on to #1377; review once that PR is merged. This PR adds support for i8x16 left shift and arithmetic right shift. Both are long sequences of instructions on x86.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 22 2020 at 17:47):

abrown updated PR #1409 from additional-i8x16-shift to master:

This is a follow-on to #1377; review once that PR is merged. This PR adds support for i8x16 left shift and arithmetic right shift. Both are long sequences of instructions on x86.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 22 2020 at 17:55):

abrown updated PR #1409 from additional-i8x16-shift to master:

This is a follow-on to #1377; review once that PR is merged. This PR adds support for i8x16 left shift and arithmetic right shift. Both are long sequences of instructions on x86.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 22 2020 at 18:54):

abrown updated PR #1409 from additional-i8x16-shift to master:

This is a follow-on to #1377; review once that PR is merged. This PR adds support for i8x16 left shift and arithmetic right shift. Both are long sequences of instructions on x86.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 22 2020 at 18:55):

abrown requested julian-seward1 for a review on PR #1409.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:11):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:11):

julian-seward1 created PR Review Comment:

Read naively, this would seem to insert the mask table once for every converted ishl. That would be ungood. Does pos.func.dfg.constants.insert de-dup, and hence keep just one copy?

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:45):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:45):

julian-seward1 created PR Review Comment:

What does this refer to here? On the whole I'd prefer to stick with the Intel style convention, where the rightmost lane is lane zero. But note; my comment is very "drive-by"; I don't know what the lane numbering conventions in CL are.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:45):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:45):

julian-seward1 created PR Review Comment:

Did you mean "shift an extra 8 bits" ?

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:49):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:53):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:55):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:56):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:58):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 06:58):

julian-seward1 submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 15:18):

abrown submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 15:18):

abrown created PR Review Comment:

ConstantPool does de-duplicate values but currently it is limited to a per-function boundary because of how things are compiled. I opened #1385 to talk about this some more: I think with a bit of thought we could de-duplicate across modules at least.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 15:21):

abrown submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 15:21):

abrown created PR Review Comment:

Ok, we can switch to Intel-style. I went back and forth on this one and I can't recall why I chose this ordering. I'll look around the file to see if there was something that made me choose this.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 15:23):

abrown submitted PR Review.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 15:23):

abrown created PR Review Comment:

Yup, good catch.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 15:56):

abrown updated PR #1409 from additional-i8x16-shift to master:

This is a follow-on to #1377; review once that PR is merged. This PR adds support for i8x16 left shift and arithmetic right shift. Both are long sequences of instructions on x86.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 16:35):

abrown updated PR #1409 from additional-i8x16-shift to master:

This is a follow-on to #1377; review once that PR is merged. This PR adds support for i8x16 left shift and arithmetic right shift. Both are long sequences of instructions on x86.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 17:08):

abrown updated PR #1409 from additional-i8x16-shift to master:

This is a follow-on to #1377; review once that PR is merged. This PR adds support for i8x16 left shift and arithmetic right shift. Both are long sequences of instructions on x86.

view this post on Zulip Wasmtime GitHub notifications bot (Apr 23 2020 at 17:55):

abrown merged PR #1409.

Last updated: Oct 23 2024 at 20:03 UTC