Wasmtime GitHub notifications bot (Jul 23 2026 at 13:14): Wasmtime GitHub notifications bot (Jul 23 2026 at 13:14):SebTardif opened PR #13943 from SebTardif:fix/riscv64-stack-switch-sp to bytecodealliance:main:
Summary
Applies the same stack-switch fix as #13883 to riscv64: decrement
spbefore storing callee-saved registers so writes land in reserved stack space.Closes #13884
Why
Issue #13884 notes riscv64 still stores below SP before the
addi, which can race with signal handlers (same root cause as the riscv32imac fix).Test plan
- [x] Diff matches the #13883 offset pattern (reserve
0xd0, then positive offsets forsd/fsd)- [ ] CI fiber/stackswitch jobs for riscv64
Wasmtime GitHub notifications bot (Jul 23 2026 at 13:14):SebTardif requested wasmtime-core-reviewers for a review on PR #13943.
Wasmtime GitHub notifications bot (Jul 23 2026 at 13:14):SebTardif requested pchickey for a review on PR #13943.
Wasmtime GitHub notifications bot (Jul 23 2026 at 14:03)::thumbs_up: cfallin submitted PR review.
Wasmtime GitHub notifications bot (Jul 23 2026 at 14:03)::speech_balloon: cfallin created PR review comment:
No need for this narrative comment pointing to a random other architecture -- it explains the path you took but it's not needed to explain the source. Just "Reserve space before writing" is fine.
Wasmtime GitHub notifications bot (Jul 23 2026 at 14:34):SebTardif updated PR #13943.
Wasmtime GitHub notifications bot (Jul 23 2026 at 14:35):SebTardif commented on PR #13943:
Addressed @cfallin's comment in 3834bf88e: comment is now just "Reserve space before writing."
Wasmtime GitHub notifications bot (Jul 23 2026 at 15:11):cfallin added PR #13943 fiber: reserve stack before saving registers on riscv64 to the merge queue.
Wasmtime GitHub notifications bot (Jul 23 2026 at 15:37)::check: cfallin merged PR #13943.
Wasmtime GitHub notifications bot (Jul 23 2026 at 15:37):cfallin removed PR #13943 fiber: reserve stack before saving registers on riscv64 from the merge queue.
Last updated: Jul 29 2026 at 05:03 UTC