macovedj opened PR #13921 from macovedj:winch-aarch64-v128-bitwise to bytecodealliance:main:
Continuing with aarch64 simd, added bitwise ops (not/and/andnot/or/xor/bitselect/any_true).
macovedj requested cfallin for a review on PR #13921.
macovedj requested wasmtime-compiler-reviewers for a review on PR #13921.
macovedj requested wasmtime-core-reviewers for a review on PR #13921.
:thumbs_up: cfallin submitted PR review:
Thanks!
:speech_balloon: cfallin created PR review comment:
tiny nit, but rustdoc style: blank line between this summary line and the below detailed paragraph
cfallin commented on PR #13921:
(LGTM is for last commit, which is stacked on top of your previous PR -- happy to merge this one once the prior lands and the commits are rebased out, since we do squash-on-merge)
github-actions[bot] added the label winch on PR #13921.
github-actions[bot] commented on PR #13921:
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macovedj updated PR #13921.
macovedj commented on PR #13921:
(LGTM is for last commit, which is stacked on top of your previous PR -- happy to merge this one once the prior lands and the commits are rebased out, since we do squash-on-merge)
Thanks! Rebased.
cfallin added PR #13921 winch(aarch64): add v128 bitwise ops to the merge queue.
github-merge-queue[bot] removed PR #13921 winch(aarch64): add v128 bitwise ops from the merge queue.
alexcrichton added PR #13921 winch(aarch64): add v128 bitwise ops to the merge queue.
:check: alexcrichton merged PR #13921.
alexcrichton removed PR #13921 winch(aarch64): add v128 bitwise ops from the merge queue.
Last updated: Jul 29 2026 at 05:03 UTC