Stream: git-wasmtime

Topic: wasmtime / PR #13738 riscv64: Add Zvbb (Vector Basic Bit-...

Wasmtime GitHub notifications bot (Jun 26 2026 at 02:42):

rajeshgangam opened PR #13738 from rajeshgangam:zvbb-extension to bytecodealliance:main:

Summary

Add support for the RISC-V Zvbb extension in the Cranelift backend, implementing instruction selection and encoding for 13 vector bit-manipulation instructions.

• Add has_zvbb feature flag for the riscv64 ISA
• Implement encoding for vandn, vrol, vror (two-operand), vror.vi (immediate), and vbrev, vbrev8, vrev8, vclz, vctz, vcpop (single-operand VXUNARY0)
• Add lowering rules gated by has_zvbb: band(x, bnot(y)) → vandn, popcnt → vcpop, rotl → vrol.vx, rotr → vror.vx
• Without Zvbb, all operations fall back to existing software emulation paths

Instructions implemented

Instruction	Encoding	Cranelift IR pattern
vandn.vv / .vx	funct6=0b000001, OPIVV/OPIVX	band(x, bnot(y))
vrol.vv / .vx	funct6=0b010101, OPIVV/OPIVX	rotl(vec, scalar)
vror.vv / .vx / .vi	funct6=0b010100, OPIVV/OPIVX/OPIVI	rotr(vec, scalar)
vbrev.v	funct6=0b010010, vs1=01010	(helper only)
vbrev8.v	funct6=0b010010, vs1=01000	(helper only)
vrev8.v	funct6=0b010010, vs1=01001	(helper only)
vclz.v	funct6=0b010010, vs1=01100	(helper only)
vctz.v	funct6=0b010010, vs1=01101	(helper only)
vcpop.v	funct6=0b010010, vs1=01110	popcnt(vec)

Note: vclz, vctz, vbrev, vbrev8, vrev8 have ISLE helpers and correct encoding but no lowering rules yet because clz, ctz, bitrev, bswap are scalar-only in Cranelift IR. They are ready for use when vector-typed versions of these ops are added.

vwsll (widening shift left) is deferred to a follow-up PR due to the large number of widening combination rules needed.

Resolves #7187

Test plan

• [x] test compile precise-output tests verify correct instruction selection and encoding across i8x16, i32x4, i64x2 element types (zvbb.clif)
• [x] test run runtime tests verify correctness under QEMU riscv64 with zvbb=true (zvbb-run.clif)
• [x] All 235 existing riscv64 filetests pass (no regressions)
• [x] Fallback paths still produce correct results when has_zvbb is not set

Wasmtime GitHub notifications bot (Jun 26 2026 at 02:42):

rajeshgangam requested cfallin for a review on PR #13738.

Wasmtime GitHub notifications bot (Jun 26 2026 at 02:42):

rajeshgangam requested wasmtime-compiler-reviewers for a review on PR #13738.

Wasmtime GitHub notifications bot (Jun 26 2026 at 06:05):

github-actions[bot] added the label cranelift on PR #13738.

Wasmtime GitHub notifications bot (Jun 26 2026 at 06:05):

github-actions[bot] added the label cranelift:meta on PR #13738.

Wasmtime GitHub notifications bot (Jun 26 2026 at 06:05):

github-actions[bot] added the label isle on PR #13738.

Wasmtime GitHub notifications bot (Jun 26 2026 at 06:05):

github-actions[bot] commented on PR #13738:

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cc @cfallin, @fitzgen

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Wasmtime GitHub notifications bot (Jun 28 2026 at 17:59):

:thumbs_up: cfallin submitted PR review:

Thanks! Just one file-placement nit but otherwise LGTM. Happy to merge once that's done.

Wasmtime GitHub notifications bot (Jun 28 2026 at 17:59):

:speech_balloon: cfallin created PR review comment:

Run-tests should be in filetests/runtests/. The purpose of that shared (non-ISA-specific) location is so that we can enable other platforms too as the test becomes runnable on them.

Can you move it there, and then add at least Pulley (assuming it does not have missing vector support here) and also other platforms if they work?

Wasmtime GitHub notifications bot (Jun 28 2026 at 18:00):

cfallin commented on PR #13738:

(Logistical note: I'm on PTO and mid-roadtrip right now; was happy to review since it was on my queue but I'll reassign to @fitzgen for final signoff once the runtest is moved as per above)

Wasmtime GitHub notifications bot (Jun 28 2026 at 18:01):

cfallin requested fitzgen for a review on PR #13738.

Wasmtime GitHub notifications bot (Jun 29 2026 at 00:59):

rajeshgangam updated PR #13738.

Wasmtime GitHub notifications bot (Jun 29 2026 at 01:08):

:memo: rajeshgangam submitted PR review.

Wasmtime GitHub notifications bot (Jun 29 2026 at 01:08):

:speech_balloon: rajeshgangam created PR review comment:

Done — moved zvbb-run.clif to runtests/simd-bitops-zvbb.clif and added test interpret so it validates on all platforms.

I checked Pulley, x86_64, and aarch64 — none of them have vector rotl/rotr lowerings (only scalar), so I couldn't add them as test run targets. The compile test (isa/riscv64/zvbb.clif) stays in place since it verifies riscv64-specific codegen.

Wasmtime GitHub notifications bot (Jun 29 2026 at 15:53):

:thumbs_up: fitzgen submitted PR review:

Thanks!

Wasmtime GitHub notifications bot (Jun 29 2026 at 15:53):

fitzgen added PR #13738 riscv64: Add Zvbb (Vector Basic Bit-manipulation) extension support to the merge queue.

Wasmtime GitHub notifications bot (Jun 29 2026 at 16:18):

:check: fitzgen merged PR #13738.

Wasmtime GitHub notifications bot (Jun 29 2026 at 16:18):

fitzgen removed PR #13738 riscv64: Add Zvbb (Vector Basic Bit-manipulation) extension support from the merge queue.

Last updated: Jul 29 2026 at 05:03 UTC