avanhatt opened PR #13550 from avanhatt:upstream-06-02 to bytecodealliance:main:
Update the core ISLE verifier for formal, SMT-based checking of instruction lowering rules. This brings the implementation up-to-date with our work described at OOPSLA 2025, rather than the prior ASPLOS 2024 implementation.
The core improvements are:
- Automatic rule chaining. Rather than requiring specifications on every ISLE term, terms can be marked
veri chainto be automatically composed/inlined. This reduces the specification burden substantially. See the paper for details.- For the
aarch64backend, most machine instMinstspecifications are automatically derived from the authoritative ARM ASL reference, with our work building on the ASLp project to derive more targeted specifications for this domain.- Our state modeling now handles traps and other side effects more explicitly, see the paper for details.
- The specification language is more expressive, including structs and macros. See the language reference updates for details.
avanhatt updated PR #13550.
:memo: bjorn3 submitted PR review.
:speech_balloon: bjorn3 created PR review comment:
Accidental commit?
avanhatt updated PR #13550.
avanhatt updated PR #13550.
:memo: avanhatt submitted PR review.
:speech_balloon: avanhatt created PR review comment:
Ah yes, thanks for spotting!
avanhatt updated PR #13550.
github-actions[bot] added the label cranelift on PR #13550.
github-actions[bot] added the label cranelift:area:aarch64 on PR #13550.
github-actions[bot] added the label cranelift:meta on PR #13550.
avanhatt updated PR #13550.
:memo: cfallin submitted PR review:
This largely looks good! I skimmed over any
spec/model/attrforms in the diffs of ISLE, and the cranelift/isle/veri tree in general; reviewed more carefully the bits that were touched in Cranelift and the ISLE compiler proper. Some logistical comments but nothing really substantial. Thanks for all the work in getting this in shape for upstreaming!
:speech_balloon: cfallin created PR review comment:
Spurious code-motion in diff?
:speech_balloon: cfallin created PR review comment:
likewise here as above -- no need for doc-comments that just reproduce function names
:speech_balloon: cfallin created PR review comment:
Unnecessary/trivial doc comments here and below? (
shift_onesbeing described as "Shift ones" doesn't add anything; but then we don't need doc-comments here, perhaps we can just drop)
:speech_balloon: cfallin created PR review comment:
For this and related prelude ISLE for the spec (e.g.
fpconst.isle,inst_tags.isle,inst_spec.isle, ...) could we put it in a subdirectory, e.g.spec/?
:speech_balloon: cfallin created PR review comment:
Let's use workspace deps here; and I'll need to push vets before this merges to make
cargo-vethappy
:speech_balloon: cfallin created PR review comment:
Is this a codegen change? It's not totally clear to me (I haven't traced through the emit code) but this is at least adding some new logic where we passed
sizethrough toMInst.MovToFpudirectly before.
:speech_balloon: cfallin created PR review comment:
Likewise here (and elsewhere in this diff) -- workspace deps only, to centralize our deps management and version upgrades.
:memo: avanhatt submitted PR review.
:speech_balloon: avanhatt created PR review comment:
Ah, we added uses of
cranelift_codegen::isa::aarch64::inst::...withincranelift/isle/veri, which made all of these faildeny(missing_docs).Would we prefer I add an
#![allow(missing_docs)]with a comment that we use these withincranelift/isle/veri? Or something else?
:memo: avanhatt submitted PR review.
:speech_balloon: avanhatt created PR review comment:
This was actually intentional, but for a niche reason.
The verifier was previously failing to type check the use of the
get_exception_handler_addressISLE term. It turned out that this was the only term with both a raw block and an immediate, and that the order thatgen_isleadded the block, then the immediate, did not match the order of the declaration:Builder::new("ExceptionHandlerAddress") .raw_block() .imm(&imm.imm64) .build(),Because the veri code does _not_ expand external extractors and used the generated ISLE
declfor this type directly (shown below), this mismatch made the rule appear to have incorrect argument order. Whereas in standard ISLE codegen, the _inlined_ extractor had the same swapped order, essentially cancelling out the mismatch.Before, generated code on
main:(decl get_exception_handler_address (Type Block Imm64) Inst) ;; cranelift/codegen/meta/src/gen_isle.rs:243 (extractor ;; cranelift/codegen/meta/src/gen_isle.rs:262 (get_exception_handler_address ty block index) ;; cranelift/codegen/meta/src/gen_isle.rs:264 (inst_data_value ty (InstructionData.ExceptionHandlerAddress (Opcode.GetExceptionHandlerAddress) index block)) )Note the first line has block, then immediate, but the last line has immediate, then block.
It's a bit annoying because making the orders match required me to also change the arg order of the
get_exception_handler_addressrule in all backends, but it feels like the right move because before, all the rules used an argument order different from the generateddecl.The new generated code:
(decl get_exception_handler_address (Type Block Imm64) Inst) ;; cranelift/codegen/meta/src/gen_isle.rs:243 (extractor ;; cranelift/codegen/meta/src/gen_isle.rs:262 (get_exception_handler_address ty block index) ;; cranelift/codegen/meta/src/gen_isle.rs:264 (inst_data_value ty (InstructionData.ExceptionHandlerAddress (Opcode.GetExceptionHandlerAddress) block index)) )Let me know if you prefer a different fix, though, or for me to land this change separately?
:memo: avanhatt submitted PR review.
:speech_balloon: avanhatt created PR review comment:
My intention was to break the recursion (the new
size_for_mov_to_fpuactually should not have therectag, fixing) to allow chaining, but match the logic/not change codegen.Reasoning:
- If
sizeisScalarSize.Size16and(use_fp16)is false, the higher-priority rule below will match andsize_for_mov_to_fpuwill pass(ScalarSize.Size32).- In all other cases, the default
size_for_mov_to_fpurule just passes thesizeback.That is, we didn't pass
sizethrough directly toMInst.MovToFpudirectly before in exactly the same case, due to the recursive rule below this one:(rule 1 (mov_to_fpu x (ScalarSize.Size16)) (if-let false (use_fp16)) (mov_to_fpu x (ScalarSize.Size32)))
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
:memo: cfallin submitted PR review.
:speech_balloon: cfallin created PR review comment:
Ah, OK, I missed that interaction -- thanks! Resolving this thread.
:memo: cfallin submitted PR review.
:speech_balloon: cfallin created PR review comment:
Ah! OK, yeah, the pragma-allow is fine for now. I guess at some point we should come through and write proper doc comments (since these will show up in the cranelift-codegen docs now) but that can be a later-problem.
:memo: cfallin submitted PR review.
:speech_balloon: cfallin created PR review comment:
Ah, you actually fixed a latent bug then (in a certain manner of seeing at, at least) -- thanks and this is fine!
:memo: cfallin submitted PR review.
:speech_balloon: cfallin created PR review comment:
Does this debug code need to stay in-tree? (It looks like it's trying to help find very deeply nested invocations? In any case I'd rather not have the ad-hoc thread-local magic here if we don't need this check permanently)
cfallin commented on PR #13550:
Looks like things are pretty much addressed -- thanks again! One comment above; once that's addressed, as well as the current merge conflict with
main, go ahead and flip this out of Draft mode (assuming it's ready and there aren't more TODOs you want to address?), and add a commit withprtest:allin the description; that'll run the full CI pipeline and we can see failures.(One of those failures will be a
cargo vetfailure most likely; I can pull down the branch, do my vets locally, and push a new commit on top of your branch to address)
avanhatt updated PR #13550.
:memo: avanhatt submitted PR review.
:speech_balloon: avanhatt created PR review comment:
Oops, did not mean to include, removed!
avanhatt updated PR #13550.
mmcloughlin updated PR #13550.
mmcloughlin updated PR #13550.
mmcloughlin updated PR #13550.
avanhatt updated PR #13550.
mmcloughlin updated PR #13550.
mmcloughlin updated PR #13550.
mmcloughlin updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt has marked PR #13550 as ready for review.
avanhatt requested wasmtime-compiler-s390x-reviewers for a review on PR #13550.
avanhatt requested alexcrichton for a review on PR #13550.
avanhatt requested wasmtime-compiler-reviewers for a review on PR #13550.
avanhatt requested wasmtime-default-reviewers for a review on PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
avanhatt updated PR #13550.
github-actions[bot] added the label isle on PR #13550.
github-actions[bot] commented on PR #13550:
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Last updated: Jul 29 2026 at 05:03 UTC