Stream: git-wasmtime

Topic: wasmtime / PR #13336 cranelift(aarch64): lower bare ctz/c...

Wasmtime GitHub notifications bot (May 11 2026 at 17:14):

ggreif opened PR #13336 from ggreif:gabor/ctz-clz-brif-lowering-aarch64 to bytecodealliance:main:

aarch64 analogue of #13334; egraph counterpart in #13332.

Stacked on #13334. The first two commits in this PR are from #13334 (x64); the aarch64-specific change is the third (HEAD) commit. Mark as ready / merge after #13334 lands.

Same shape as the x64 follow-up: specialise is_nonzero (ctz X) / is_nonzero (clz X) (and their ireduce-wrapped variants) in cranelift/codegen/src/isa/aarch64/inst.isle, so the wasm-natural brif (ireduce.i32 (ctz.i64 X)) shape lowers to a single bit-test instead of rbit; clz; cmp; b.cond.

aarch64-specific instructions used:

• ctz: tst Xn, #1 (logical AND with immediate, flags only) + Cond.Eq — branches when LSB is clear.
• clz: cmp Xn, #0 + Cond.Pl — branches when sign bit (N flag) is clear, i.e. X is signed-non-negative.

Test deltas (tests/disas/aarch64-ctz-clz-bool-condition.wat, newly added):

consumer	before	after
if_ctz_bare_i32	4 insns (rbit + clz + ...)	2 (tst w4, #1; b.eq)
if_ctz_bare_i64	4 insns	2 (tst x4, #1; b.eq)
if_clz_bare_i32	4 insns (clz + ...)	2 (cmp w4, #0; b.pl)

Negative test ((ctz X) == 4) correctly untouched. Same motivation as #13334 — closes the gap for non-Rust wasm frontends like Motoko's moc.

riscv64 and s390x to follow.

Last updated: Jun 01 2026 at 09:49 UTC