abrown opened PR #1318 from remove-fpr32
to master
:
Until #1306 is resolved (some spilling/regalloc issue with larger FPR register banks), this removes FPR32 support. Only Wasm's
i64x2.mul
was using this register class and that instruction is predicated on AVX512 support; for the time being, that instruction will have to make do with the 16 FPR registers.<!--
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abrown requested alexcrichton for a review on PR #1318.
iximeow submitted PR Review.
bjorn3 submitted PR Review.
bjorn3 created PR Review Comment:
FIXME set back to 32 when FPR32 is re-added
bjorn3 submitted PR Review.
abrown submitted PR Review.
abrown created PR Review Comment:
I don't think I need to remind myself where to expand the register bank...
abrown updated PR #1318 from remove-fpr32
to master
:
Until #1306 is resolved (some spilling/regalloc issue with larger FPR register banks), this removes FPR32 support. Only Wasm's
i64x2.mul
was using this register class and that instruction is predicated on AVX512 support; for the time being, that instruction will have to make do with the 16 FPR registers.<!--
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abrown submitted PR Review.
abrown created PR Review Comment:
@alexcrichton, I shouldn't need to assert anything here, right? Wasmtime will still attempt to compile this inside
module(...)
?
alexcrichton submitted PR Review.
alexcrichton created PR Review Comment:
I believe so yeah, but it might be good to double-check by running the tests before this PR as well to make sure this test fails.
abrown updated PR #1318 from remove-fpr32
to master
:
Until #1306 is resolved (some spilling/regalloc issue with larger FPR register banks), this removes FPR32 support. Only Wasm's
i64x2.mul
was using this register class and that instruction is predicated on AVX512 support; for the time being, that instruction will have to make do with the 16 FPR registers.<!--
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alexcrichton submitted PR Review.
abrown updated PR #1318 from remove-fpr32
to master
:
Until #1306 is resolved (some spilling/regalloc issue with larger FPR register banks), this removes FPR32 support. Only Wasm's
i64x2.mul
was using this register class and that instruction is predicated on AVX512 support; for the time being, that instruction will have to make do with the 16 FPR registers.<!--
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the PR.
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description becomes long, the matter should probably be discussed in an issue
first.[ ] This PR contains test cases, if meaningful.
- [ ] A reviewer from the core maintainer team has been assigned for this PR.
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abrown merged PR #1318.
Last updated: Nov 22 2024 at 17:03 UTC